[llvm] 8dd14e1 - [X86] Add test showing failure to combine 128-bit PTEST of split vectors

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-01-27T13:10:43Z
New Revision: 8dd14e1757ebca9090a22a3166c8a17558fb7a21

URL: https://github.com/llvm/llvm-project/commit/8dd14e1757ebca9090a22a3166c8a17558fb7a21
DIFF: https://github.com/llvm/llvm-project/commit/8dd14e1757ebca9090a22a3166c8a17558fb7a21.diff

LOG: [X86] Add test showing failure to combine 128-bit PTEST of split vectors

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-ptest.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/combine-ptest.ll b/llvm/test/CodeGen/X86/combine-ptest.ll
index 975440cf8297a..5781ae6e70a7f 100644
--- a/llvm/test/CodeGen/X86/combine-ptest.ll
+++ b/llvm/test/CodeGen/X86/combine-ptest.ll
@@ -392,6 +392,46 @@ define i32 @ptestz_v32i8_signbits(<32 x i8> %c, i32 %a, i32 %b) {
   ret i32 %t5
 }
 
+;
+; testz(or(extract_lo(X),extract_hi(X),or(extract_lo(Y),extract_hi(Y)) -> testz(X,Y)
+;
+
+define i32 @ptestz_v2i64_concat(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) {
+; AVX1-LABEL: ptestz_v2i64_concat:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    movl %edi, %eax
+; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
+; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
+; AVX1-NEXT:    vpor %xmm2, %xmm0, %xmm0
+; AVX1-NEXT:    vpor %xmm1, %xmm3, %xmm1
+; AVX1-NEXT:    vptest %xmm1, %xmm0
+; AVX1-NEXT:    cmovnel %esi, %eax
+; AVX1-NEXT:    vzeroupper
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: ptestz_v2i64_concat:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    movl %edi, %eax
+; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
+; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm3
+; AVX2-NEXT:    vpor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT:    vpor %xmm1, %xmm3, %xmm1
+; AVX2-NEXT:    vptest %xmm1, %xmm0
+; AVX2-NEXT:    cmovnel %esi, %eax
+; AVX2-NEXT:    vzeroupper
+; AVX2-NEXT:    retq
+  %t1 = shufflevector <4 x i64> %c, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
+  %t2 = shufflevector <4 x i64> %c, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
+  %t3 = shufflevector <4 x i64> %d, <4 x i64> undef, <2 x i32> <i32 0, i32 1>
+  %t4 = shufflevector <4 x i64> %d, <4 x i64> undef, <2 x i32> <i32 2, i32 3>
+  %t5 = or <2 x i64> %t1, %t2
+  %t6 = or <2 x i64> %t4, %t3
+  %t7 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t5, <2 x i64> %t6)
+  %t8 = icmp ne i32 %t7, 0
+  %t9 = select i1 %t8, i32 %a, i32 %b
+  ret i32 %t9
+}
+
 declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone
 declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone