[PATCH] D118345: [AArch64][SVE] Fold gather/scatter with 32bits when possible

[Caroline via Phabricator via llvm-commits]

CarolineConcatto created this revision.
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In AArch64ISelLowering.cpp this patch implements these folds:

1. GEP (%ptr, SHL ((splat(%offset) + stepvector(A)) << splat(B)))

into GEP (%ptr + (%offset << B), step_vector (A << B))

The above transform simplifies the index operand so that it can be expressed
as i32 elements.
This allows using only one gather/scatter assembly instruction instead of two.

Patch by Paul Walker (@paulwalker-arm).

Depends on D117900 <https://reviews.llvm.org/D117900>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118345

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll

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