[PATCH] D117900: [AArch64][SVE] Fold gather/scatter with 32bits when possible

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 27 03:24:38 PST 2022


CarolineConcatto updated this revision to Diff 403575.
CarolineConcatto marked 12 inline comments as done.
CarolineConcatto edited the summary of this revision.
CarolineConcatto added a comment.

- This patch has only this pattern GEP (%ptr, (splat(%offset) + stepvector(A)))


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117900/new/

https://reviews.llvm.org/D117900

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D117900.403575.patch
Type: text/x-patch
Size: 14579 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220127/58cc996c/attachment.bin>


More information about the llvm-commits mailing list