[PATCH] D118222: [RISCV] Split f64 undef into two integer undefs

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead updated this revision to Diff 403469.
pcwang-thead added a comment.

Change to DAG combine.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118222/new/

https://reviews.llvm.org/D118222

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll


Index: llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
===================================================================
--- llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
+++ llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
@@ -265,3 +265,10 @@
   %3 = trunc i64 %2 to i32
   ret i32 %3
 }
+
+define double @func_return_undef() {
+; RV32-ILP32D-LABEL: func_return_undef:
+; RV32-ILP32D:       # %bb.0:
+; RV32-ILP32D-NEXT:    ret
+  ret double undef
+}
Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -7509,6 +7509,12 @@
     if (Op0->getOpcode() == RISCVISD::BuildPairF64)
       return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1));
 
+    if (Op0->isUndef()) {
+      SDValue Lo = DAG.getUNDEF(MVT::i32);
+      SDValue Hi = DAG.getUNDEF(MVT::i32);
+      return DCI.CombineTo(N, Lo, Hi);
+    }
+
     SDLoc DL(N);
 
     // It's cheaper to materialise two 32-bit integers than to load a double


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