[PATCH] D118305: [Spill2Reg] Added code generation support for 8/16bit spills/reloads in x86

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/X86/spill2reg_end_to_end_8bit.ll:70
 ; CHECK-NEXT:    .cfi_offset %rbp, -16
-; CHECK-NEXT:    movb D0(%rip), %al
-; CHECK-NEXT:    movb %al, {{[-0-9]+}}(%r{{[sb]}}p) # 1-byte Spill
+; CHECK-NEXT:    movb D0(%rip), %eax
+; CHECK-NEXT:    movd %eax, %xmm3
----------------
This code looks invalid. movb can't have a %eax destination


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118305/new/

https://reviews.llvm.org/D118305