[PATCH] D118264: [DAG] SelectionDAG::getNode(N1,N2) - detect N2 constant vector splats as well as scalars

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll:825
 ; CHECK-NEXT:    and v0.8b, v0.8b, v1.8b
-; CHECK-NEXT:    orr v0.2s, #0
 ; CHECK-NEXT:    ret
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craig.topper wrote:
> Checking my understanding. This happened before because vselect expansion created twos Ands and an Or. One of the Ands constant folded immediately. Then custom legalization for Or created a special AArch64ISD::ORRi. This all occurred inside of legalize vector ops.
> 
> There's no DAG combine for AArch64ISD::ORRi to catch this after legalize vector ops.
> 
> Your patch fixes this because the Or will be simplified when it is created.
That matches what I think is going on as well - in all the cases here, by avoiding creating an unnecessary node, we're changing the order of node evaluation just enough to stop getting caught in a deadend.

This is a preliminary fix necessary to improve PTEST codgen where we're failing to fold the PCMPEQ(X,0) -> SUB(X,0) -> X in time.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D118264/new/

https://reviews.llvm.org/D118264