[llvm] d70d997 - [x86] add test for miscompile from wrong min signbits ( #53401 ); NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2022-01-26T10:22:41-05:00
New Revision: d70d9977999b8a08fe5635fb2c58588e6ffb7997

URL: https://github.com/llvm/llvm-project/commit/d70d9977999b8a08fe5635fb2c58588e6ffb7997
DIFF: https://github.com/llvm/llvm-project/commit/d70d9977999b8a08fe5635fb2c58588e6ffb7997.diff

LOG: [x86] add test for miscompile from wrong min signbits ( #53401 ); NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/vselect-constants.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/vselect-constants.ll b/llvm/test/CodeGen/X86/vselect-constants.ll
index 9422b836d39dd..8aba81824d121 100644
--- a/llvm/test/CodeGen/X86/vselect-constants.ll
+++ b/llvm/test/CodeGen/X86/vselect-constants.ll
@@ -273,3 +273,37 @@ BB:
   %smax96 = select <2 x i1> %c0, <2 x i37> %xor_x, <2 x i37> zeroinitializer
   ret <2 x i37> %smax96
 }
+
+; PR53401
+
+define i32 @wrong_min_signbits(<2 x i16> %x) {
+; SSE-LABEL: wrong_min_signbits:
+; SSE:       # %bb.0:
+; SSE-NEXT:    pxor %xmm1, %xmm1
+; SSE-NEXT:    pcmpeqw %xmm0, %xmm1
+; SSE-NEXT:    movdqa {{.*#+}} xmm0 = [1,0,0,0]
+; SSE-NEXT:    pandn %xmm0, %xmm1
+; SSE-NEXT:    psllw $15, %xmm1
+; SSE-NEXT:    psraw $15, %xmm1
+; SSE-NEXT:    movdqa %xmm1, %xmm2
+; SSE-NEXT:    pandn %xmm0, %xmm2
+; SSE-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT:    por %xmm2, %xmm1
+; SSE-NEXT:    movd %xmm1, %eax
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: wrong_min_signbits:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [1,0,0,0]
+; AVX-NEXT:    vpandn %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vpblendvb %xmm0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
+; AVX-NEXT:    vmovd %xmm0, %eax
+; AVX-NEXT:    retq
+  %true_true = icmp ne <2 x i16> %x, zeroinitializer
+  %true_false = and <2 x i1> %true_true, <i1 true, i1 false>
+  %sel = select <2 x i1> %true_false, <2 x i16> <i16 2, i16 0>, <2 x i16> <i16 1, i16 0>
+  %t1 = bitcast <2 x i16> %sel to i32
+  ret i32 %t1
+}