[PATCH] D117355: [PowerPC] Fix the undef virtual register reading failure for PPC backend trap optimization

[Amy Kwan via Phabricator via llvm-commits]

amyk added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:432
       if (EnableTrapOptimization && TrapOpt) {
+        bool IsVReg =
+            (MI.getNumOperands() && MI.getOperand(0).isReg())
----------------
Might be good to pull out `MI.getOperand(0).isReg()` into a separate variable since you're using it three times here. 


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Comment at: llvm/test/CodeGen/PowerPC/mi-peephole-trap-opt-dominated-block.mir:1
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir < %s \
+# RUN:   -verify-machineinstrs -start-before=ppc-mi-peepholes \
----------------
Question: are AIX run lines necessary, too? 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117355/new/

https://reviews.llvm.org/D117355