[PATCH] D118054: [AArch64][SVE] Mark PFALSE as side-effect free.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

In D118054#3267812 <https://reviews.llvm.org/D118054#3267812>, @efriedma wrote:

> It looks like AArch64TargetLowering::LowerSPLAT_VECTOR is using DAG.getMachineNode in an inappropriate way: generally, in SelectionDAG, we shouldn't be creating Machine nodes before isel (AArch64DAGToDAGISel::Select).  The "proper" construct is to define AArch64ISD::PFALSE, then add a pattern to lower it during isel.
>
> The reason I bring this up is that hasSideEffects is usually inferred from isel patterns.

Ah that makes a lot of sense! I was a bit puzzled as to why it just worked for PTRUE, but not for PFALSE.
I've reimplemented it now by creating an explicit AArch64ISD node for it instead with patterns.


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