[PATCH] D118113: [JITLink][RISCV] fix the R_RISCV_BRANCH relocation's behavior

[Siwei Zhang via Phabricator via llvm-commits]

fourdim created this revision.
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This patch fixes the R_RISCV_BRANCH relocation as the original one will miss one bit when calculating the fixup value.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118113

Files:
  llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
  llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp


Index: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
===================================================================
--- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
+++ llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
@@ -212,11 +212,10 @@
       if (AlignmentIssue) {
         return AlignmentIssue;
       }
-      int64_t Lo = Value & 0xFFF;
-      uint32_t Imm31_25 = extractBits(Lo, 5, 6) << 25 | extractBits(Lo, 12, 1)
-                                                            << 31;
-      uint32_t Imm11_7 = extractBits(Lo, 1, 4) << 8 | extractBits(Lo, 11, 1)
-                                                          << 7;
+      uint32_t Imm31_25 =
+          extractBits(Value, 5, 6) << 25 | extractBits(Value, 12, 1) << 31;
+      uint32_t Imm11_7 =
+          extractBits(Value, 1, 4) << 8 | extractBits(Value, 11, 1) << 7;
       uint32_t RawInstr = *(little32_t *)FixupPtr;
       *(little32_t *)FixupPtr = (RawInstr & 0x1FFF07F) | Imm31_25 | Imm11_7;
       break;
@@ -272,8 +271,8 @@
       auto RelHI20 = getRISCVPCRelHi20(E);
       if (!RelHI20)
         return RelHI20.takeError();
-      int64_t Value = RelHI20->getTarget().getAddress() +
-                      RelHI20->getAddend() - E.getTarget().getAddress();
+      int64_t Value = RelHI20->getTarget().getAddress() + RelHI20->getAddend() -
+                      E.getTarget().getAddress();
       int64_t Lo = Value & 0xFFF;
       uint32_t RawInstr = *(little32_t *)FixupPtr;
       *(little32_t *)FixupPtr =
@@ -285,8 +284,8 @@
       // pairs with current relocation R_RISCV_PCREL_LO12_S. So here may need a
       // check.
       auto RelHI20 = getRISCVPCRelHi20(E);
-      int64_t Value = RelHI20->getTarget().getAddress() +
-                      RelHI20->getAddend() - E.getTarget().getAddress();
+      int64_t Value = RelHI20->getTarget().getAddress() + RelHI20->getAddend() -
+                      E.getTarget().getAddress();
       int64_t Lo = Value & 0xFFF;
       uint32_t Imm31_25 = extractBits(Lo, 5, 7) << 25;
       uint32_t Imm11_7 = extractBits(Lo, 0, 5) << 7;
@@ -529,17 +528,17 @@
 
   if ((*ELFObj)->getArch() == Triple::riscv64) {
     auto &ELFObjFile = cast<object::ELFObjectFile<object::ELF64LE>>(**ELFObj);
-    return ELFLinkGraphBuilder_riscv<object::ELF64LE>(
-               (*ELFObj)->getFileName(), ELFObjFile.getELFFile(),
-               (*ELFObj)->makeTriple())
+    return ELFLinkGraphBuilder_riscv<object::ELF64LE>((*ELFObj)->getFileName(),
+                                                      ELFObjFile.getELFFile(),
+                                                      (*ELFObj)->makeTriple())
         .buildGraph();
   } else {
     assert((*ELFObj)->getArch() == Triple::riscv32 &&
            "Invalid triple for RISCV ELF object file");
     auto &ELFObjFile = cast<object::ELFObjectFile<object::ELF32LE>>(**ELFObj);
-    return ELFLinkGraphBuilder_riscv<object::ELF32LE>(
-               (*ELFObj)->getFileName(), ELFObjFile.getELFFile(),
-               (*ELFObj)->makeTriple())
+    return ELFLinkGraphBuilder_riscv<object::ELF32LE>((*ELFObj)->getFileName(),
+                                                      ELFObjFile.getELFFile(),
+                                                      (*ELFObj)->makeTriple())
         .buildGraph();
   }
 }
Index: llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
===================================================================
--- llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
+++ llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
@@ -37,10 +37,10 @@
   ///
   R_RISCV_64,
 
-  /// Low 12 bits of PC-relative branch pointer value relocation
+  /// 12 bits of PC-relative branch pointer value relocation
   ///
   /// Fixup expression:
-  ///   Fixup <- (Target - Fixup + Addend) & 0xFFF
+  ///   Fixup <- (Target - Fixup + Addend)
   ///
   R_RISCV_BRANCH,
 


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