[PATCH] D117884: [RISCV] Add cost modelling for masked memory op

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:169
+                                    TTI::TargetCostKind CostKind) {
+  if (!isa<ScalableVectorType>(Src))
+    return BaseT::getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
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How come we're not adding support for fixed-length vectors at the same time? The commit title/description should make it clear that this is scalable-only.


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Comment at: llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll:27
+entry:
+  ; Legal fixed-width integer types
+  %v2i8 = call <2 x i8> @llvm.masked.load.v2i8.p0v2i8(<2 x i8> *undef, i32 8, <2 x i1> undef, <2 x i8> undef)
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What do you mean by "legal" here?  The test isn't testing a configuration in which fixed-length vectors are supported by the backend.


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Comment at: llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll:47
+
+  ; A couple of examples of illegal fixed-width types
+  %v4i64 = call <4 x i64> @llvm.masked.load.v4i64.p0v4i64(<4 x i64> *undef, i32 8, <4 x i1> undef, <4 x i64> undef)
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Again, what's illegal about these types?


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Comment at: llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll:92
+  ; Legal scalable floating point types
+  %nxv2f16 = call <vscale x 2 x half> @llvm.masked.load.nxv2f16.p0nxv2f16(<vscale x 2 x half> *undef, i32 8, <vscale x 2 x i1> undef, <vscale x 2 x half> undef)
+  %nxv4f16 = call <vscale x 4 x half> @llvm.masked.load.nxv4f16.p0nxv4f16(<vscale x 4 x half> *undef, i32 8, <vscale x 4 x i1> undef, <vscale x 4 x half> undef)
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This comment says that these types are legal, but the expected output is that there's an "Invalid cost"? That doesn't sound quite right.


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Comment at: llvm/test/Analysis/CostModel/RISCV/masked_ldst.ll:100
+  ; A couple of examples of illegal scalable types
+  %nxv1i64 = call <vscale x 1 x i64> @llvm.masked.load.nxv1i64.p0nxv1i64(<vscale x 1 x i64> *undef, i32 8, <vscale x 1 x i1> undef, <vscale x 1 x i64> undef)
+  %nxv4i64 = call <vscale x 4 x i64> @llvm.masked.load.nxv4i64.p0nxv4i64(<vscale x 4 x i64> *undef, i32 8, <vscale x 4 x i1> undef, <vscale x 4 x i64> undef)
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Again, what's illegal about these?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117884/new/

https://reviews.llvm.org/D117884