[PATCH] D118036: [PowerPC] Add the Power10 XS[MAX|MIN]CQP instruction.

Ting Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 24 18:22:46 PST 2022


tingwang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:2397
+  def XSMAXCQP : X_VT5_VA5_VB5<63, 676, "xsmaxcqp", []>;
+  def XSMINCQP : X_VT5_VA5_VB5<63, 740, "xsmincqp", []>;
 }
----------------
tingwang wrote:
> shchenz wrote:
> > Should be put in the below block with `Predicates = [IsISA3_1, HasVSX]`.
> > 
> > We also need one patch to move the above 4 VSX instructions to the same place.
> Sure. I will move the two XS[MAX|MIN]CQP under predicate [IsISA3_1, HasVSX]. Thanks!
> 
> Given what it was mentioned in D117006's code review that these Power10 instructions are put here temporarily, they probably will be relocated somewhere else in TD files once their locations are finally decided. Shall we leave them here for the moment?
Sorry, it was ambiguous. I mean shall we leave the other 4 here for the moment?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118036/new/

https://reviews.llvm.org/D118036



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