[llvm] 830df62 - [ConstraintElimination] Add test from PR53123.

Florian Hahn via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 24 10:32:56 PST 2022


Author: Florian Hahn
Date: 2022-01-24T18:21:56Z
New Revision: 830df62a07031d84257a8a208798a6a2b4c0461a

URL: https://github.com/llvm/llvm-project/commit/830df62a07031d84257a8a208798a6a2b4c0461a
DIFF: https://github.com/llvm/llvm-project/commit/830df62a07031d84257a8a208798a6a2b4c0461a.diff

LOG: [ConstraintElimination] Add test from PR53123.

Added: 
    

Modified: 
    llvm/test/Transforms/ConstraintElimination/sub-nuw.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/ConstraintElimination/sub-nuw.ll b/llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
index bcefc9930f3c..4d3b259b0143 100644
--- a/llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
+++ b/llvm/test/Transforms/ConstraintElimination/sub-nuw.ll
@@ -237,4 +237,38 @@ if.end:                                           ; preds = %entry
   ret void
 }
 
+define i16 @test_pr53123_sub_constraint_sign(i16 %v) {
+; CHECK-LABEL: @test_pr53123_sub_constraint_sign(
+; CHECK-NEXT:  bb.0:
+; CHECK-NEXT:    [[SUB:%.*]] = sub nuw nsw i16 32767, [[V:%.*]]
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp ugt i16 [[V]], [[SUB]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[BB_2:%.*]], label [[BB_1:%.*]]
+; CHECK:       bb.1:
+; CHECK-NEXT:    [[ADD:%.*]] = shl nuw nsw i16 [[V]], 1
+; CHECK-NEXT:    [[SUB9:%.*]] = sub nuw nsw i16 32767, [[ADD]]
+; CHECK-NEXT:    [[CMP11:%.*]] = icmp ugt i16 [[ADD]], [[SUB9]]
+; CHECK-NEXT:    br i1 false, label [[BB_3:%.*]], label [[BB_2]]
+; CHECK:       bb.2:
+; CHECK-NEXT:    ret i16 1
+; CHECK:       bb.3:
+; CHECK-NEXT:    ret i16 0
+;
+bb.0:
+  %sub = sub nuw nsw i16 32767, %v
+  %cmp1 = icmp ugt i16 %v, %sub
+  br i1 %cmp1, label %bb.2, label %bb.1
+
+bb.1:
+  %add = shl nuw nsw i16 %v, 1
+  %sub9 = sub nuw nsw i16 32767, %add
+  %cmp11 = icmp ugt i16 %add, %sub9
+  br i1 %cmp11, label %bb.3, label %bb.2
+
+bb.2:
+  ret i16 1
+
+bb.3:
+  ret i16 0
+}
+
 declare void @use(i1)


        


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