[PATCH] D118047: [SVE] Fix VLS selection error from performPostLD1Combine(...)

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally created this revision.
cameron.mcinally added reviewers: sdesmalen, paulwalker-arm, david-arm.
Herald added subscribers: ctetreau, psnobl, hiraditya, tschuett.
Herald added a reviewer: efriedma.
cameron.mcinally requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This is a patch for a VLS selection error from `performPostLD1Combine(...)`. That peep is currently specific to NEON, so bail out if fixed length SVE vectors are found.

Notice that `performPostLD1Combine(...)` is static, so I don't have access to the usual `useSVEForFixedLengthVectorVT(...)` and friends that would usually solve a problem like this. Is there a better way to handle this situation?

Also notice that the test case was reduced by Bugpoint from a real code. I tried to target the `performPostLD1Combine(...)` peep directly, but was not able to match the same code paths that trigger the optimization. Maybe someone else sees what I missed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D118047

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-ld1-post-inc.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D118047.402526.patch
Type: text/x-patch
Size: 5921 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220124/80d05367/attachment.bin>