[PATCH] D117910: [RISCV] Add side-effect-free vsetvli intrinsics

Mon Jan 24 08:01:53 PST 2022

craig.topper added a comment.

In D117910#3266172 <https://reviews.llvm.org/D117910#3266172>, @jrtc27 wrote:

> In D117910#3266144 <https://reviews.llvm.org/D117910#3266144>, @frasercrmck wrote:
>
>> In D117910#3266105 <https://reviews.llvm.org/D117910#3266105>, @kito-cheng wrote:
>>
>>> I would prefer use that to replace existing vsetvlimax and vsetvli once we verified that, I believe  vsetvl and vsetvlmax intrinsic should be no side effect on C/C++ language level.
>>
>> Yes I would have preferred that too. However I spoke with Craig offline and he told me that there are users which have now come to depend on the C/C++ vsetvli/vsetvlimax builtins having side effects. So I fear that ship may have sailed? I'd definitely be up for discussing a transition path but we'd need to assess the implications and any transition path.
>
> The extensions were experimental until extremely recently (maybe V still is, even?); as someone not hugely involved in the vector work, if non-side-effecting intrinsics are significantly better than side-effecting ones then you should prioritise getting it right. The fallout is unfortunate but will be short-term, and we've never guaranteed any kind of stability for experimental extensions. Otherwise you'll have much more pain in the long run dealing with this legacy baggage.

I have users who have used the side effecting property to prevent hoisting of V instructions like vmv.v.i by LICM when the VL is a constant. Because of where our VSETVLI insertion step happens in the pipeline, the register allocator is unable to rematerialize the vmv.v.i back to its uses to avoid copies. The VL physical register dependency prevents it. This is bad for register pressure, especially at larger LMUL values. By passing the constant VL to a sideeffecting vsetvli instruction and then passing the result to the vmv.v.i the hoisting is suppressed.

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