[PATCH] D117764: [AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 24 04:01:08 PST 2022


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp:70
+    const EVT ResultTys[] = {MVT::i64, MVT::i64, MVT::Other};
+    MachineSDNode *Node = DAG.getMachineNode(MachineOpcode, DL, ResultTys, Ops);
+    DAG.setNodeMemRefs(Node, {DstOp});
----------------
This is also creating Machine nodes very early. It may be better to create an ISD node for it instead. (Although I'm not sure how much it will matter - if there are no dag optimizations that happen for the memcpy nodes).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117764/new/

https://reviews.llvm.org/D117764



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