[PATCH] D117955: [TableGen][RISCV] Relax a restriction in generating patterns for commutable SDNodes.

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 24 02:03:20 PST 2022


frasercrmck added a comment.
Herald added a subscriber: pcwang-thead.

Ah great, I was going to do this today! My local patch wasn't as ambitious and didn't merge the intrinsic/non-intrinsic paths though. Makes sense to me. I didn't get around to doing any diffs on the generated tables - does anything but RISCV change?



================
Comment at: llvm/utils/TableGen/CodeGenDAGPatterns.cpp:4648
   if (NodeInfo.hasProperty(SDNPCommutative) || isCommIntrinsic) {
-    assert((N->getNumChildren()>=2 || isCommIntrinsic) &&
+    assert(N->getNumChildren()>=2 &&
+           (!isCommIntrinsic || N->getNumChildren()>=3) &&
----------------
Several lines here could potentially be simplified if we had a `unsigned offset = isCommIntrinsic ? 1 : 0` or somesuch. Then we could `assert(N->getNumChilden() >= 2 + offset)`, `i = offset`, `e = 2 + offset`?


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117955/new/

https://reviews.llvm.org/D117955



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