[PATCH] D115691: [PowerPC] Update P10 vector insert patterns to use refactored load/stores, and update handling of v4f32 vector insert.

[Amy Kwan via Phabricator via llvm-commits]

amyk updated this revision to Diff 402091.
amyk retitled this revision from "[PowerPC] Update P10 vector insert patterns to utilize the refactored load/store infrastructure." to "[PowerPC] Update P10 vector insert patterns to use refactored load/stores, and update handling of v4f32 vector insert.".
amyk edited the summary of this revision.
amyk added a comment.

Address Nemanja's comments:

- Pulling out the code and guarding it for P9 <https://reviews.llvm.org/P9> and above
- Update test cases affected by the change
- Update the handling to:
  - Bitcast the vector
  - Bitcast the scalar
  - Produce the v4i32 vector insert
  - Bitcast and return the result


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D115691/new/

https://reviews.llvm.org/D115691

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
  llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
  llvm/test/CodeGen/PowerPC/vec_insert_elt.ll

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