[PATCH] D117889: [RISCV][RFC] add support for zbkx subextension in MC layer.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

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Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:432
+    if (STI.getFeatureBits()[RISCV::FeatureStdExtZbkx]) {
+      LLVM_DEBUG(dbgs() << "Trying RVK table (Float in Integer):\n");
+      // Calling the auto-generated decoder function.
----------------
"Float in Integer"?


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZk.td:9
+//
+// This file describes the RISC-V instructions from the standard 'K',
+// Cryptography Instructions extension, version 1.0.0
----------------
This should be Zk not K. But since I think these should be in Zb. It doesn't really matter.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZk.td:19
+let DecoderNamespace = "RVK" in {
+let Predicates = [HasStdExtZbkx] in {
+def XPERM8 : ALU_rr<0b0010100, 0b100, "xperm8">, Sched<[]>;
----------------
This extension name starts with Zb so I think it should be in RISCVInstrInfoZb.


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Comment at: llvm/test/MC/RISCV/rv32zbkx-valid.s:12
+
+# CHECK-ASM-AND-OBJ: xperm8 t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x42,0x73,0x28]
----------------
How do these get disassembled when Zbkx and Zbp are both enabled?


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