[PATCH] D117865: [RISCV][MC] Guard vmulh, vsmul correctly.

[Yueh-Ting Chen via Phabricator via llvm-commits]

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According to v-spec 1.0, these 2 instructions shall be enabled in V ext.
but not in Zve ext. This patch addresses it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117865

Files:
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/MC/RISCV/rvv/mul.s

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