[PATCH] D117854: [RISCV] Refactor Zve* extensions.

[Jianjian Guan via Phabricator via llvm-commits]

jacquesguan added a comment.

In D117854#3260413 <https://reviews.llvm.org/D117854#3260413>, @eopXD wrote:

>> In my opinion, FeatureStdExtV just means that we have the V extension. In the instruction level, the V extension includes all the Zve* extensions. But they still have different using space which V is for application processors and Zve* is for embedded processors. Maybe it's better to not mix these two things?
>
> Yes I agree with you that they are different and shouldn't be mixed.
> On the other hand, if we want to guard `vmulh` out of `Zve*` extension shouldn't we use `FeatureStdExtV`?

Yes, this is why I remove `FeatureStdExtZve64d` from the implies of `FeatureStdExtV`, for normal v instructions, we have `HasVInstructions*` to handle it, and for the instructions that only enable for V extension, we could use `FeatureStdExtV`.


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