[PATCH] D117764: [AArch64][SelectionDAG] CodeGen for Armv8.8/9.3 MOPS

Son Tuan Vu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 20 15:35:24 PST 2022


tyb0807 marked 4 inline comments as done.
tyb0807 added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp:26
+
+  // Get the constant size of the copy/set. We don't use it.
+  uint64_t ConstSize = 0;
----------------
dmgreen wrote:
> What does "We don't use it" mean here?
Not sure. I propose to remove it


================
Comment at: llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp:63
+  // Extend i8 value to i64 if required
+  if (SrcOrValue.getValueType().getSimpleVT() == MVT::i8) {
+    SrcOrValue = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, SrcOrValue);
----------------
dmgreen wrote:
> Maybe use != MVT::i8, or add an assert. I guess it will always be an i8 or a i64? Will this only be for Set?
> 
> In llvm, singled statements don't need brackets around them and can be dropped.
I'm not sure. For `Intrinsic::memcpy` and `Intrinsic::memmove`, from `Intrinsics.td`, it seems that the type for `SrcOrValue` is `llvm_anyptr_ty`. Am I missing something here?


Repository:
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  https://reviews.llvm.org/D117764/new/

https://reviews.llvm.org/D117764



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