[llvm] 8457b61 - [test] Add tests for bswap combining. NFC
Paweł Bylica via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 20 15:20:56 PST 2022
Author: Paweł Bylica
Date: 2022-01-21T00:20:30+01:00
New Revision: 8457b61699e8b8315579c8c2ae2a2d47f28d6fc7
URL: https://github.com/llvm/llvm-project/commit/8457b61699e8b8315579c8c2ae2a2d47f28d6fc7
DIFF: https://github.com/llvm/llvm-project/commit/8457b61699e8b8315579c8c2ae2a2d47f28d6fc7.diff
LOG: [test] Add tests for bswap combining. NFC
Added:
Modified:
llvm/test/Transforms/InstCombine/bswap-fold.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/bswap-fold.ll b/llvm/test/Transforms/InstCombine/bswap-fold.ll
index da7380e0ab74..9ffae93bbbc7 100644
--- a/llvm/test/Transforms/InstCombine/bswap-fold.ll
+++ b/llvm/test/Transforms/InstCombine/bswap-fold.ll
@@ -355,6 +355,276 @@ define i64 @bs_and64i_multiuse(i64 %a, i64 %b) #0 {
ret i64 %t3
}
+
+define i64 @bs_active_high8(i64 %0) {
+; CHECK-LABEL: @bs_active_high8(
+; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP0:%.*]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: ret i64 [[TMP3]]
+;
+ %2 = shl i64 %0, 56
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+define i32 @bs_active_high7(i32 %0) {
+; CHECK-LABEL: @bs_active_high7(
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP0:%.*]], -33554432
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
+ %2 = and i32 %0, -33554432 ; 0xfe000000
+ %3 = call i32 @llvm.bswap.i32(i32 %2)
+ ret i32 %3
+}
+
+define <2 x i64> @bs_active_high4(<2 x i64> %0) {
+; CHECK-LABEL: @bs_active_high4(
+; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i64> [[TMP0:%.*]], <i64 60, i64 60>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[TMP2]])
+; CHECK-NEXT: ret <2 x i64> [[TMP3]]
+;
+ %2 = shl <2 x i64> %0, <i64 60, i64 60>
+ %3 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %2)
+ ret <2 x i64> %3
+}
+
+define <2 x i64> @bs_active_high_
diff erent(<2 x i64> %0) {
+; CHECK-LABEL: @bs_active_high_
diff erent(
+; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i64> [[TMP0:%.*]], <i64 56, i64 57>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[TMP2]])
+; CHECK-NEXT: ret <2 x i64> [[TMP3]]
+;
+ %2 = shl <2 x i64> %0, <i64 56, i64 57>
+ %3 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %2)
+ ret <2 x i64> %3
+}
+
+; negative test
+define <2 x i64> @bs_active_high_
diff erent_negative(<2 x i64> %0) {
+; CHECK-LABEL: @bs_active_high_
diff erent_negative(
+; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i64> [[TMP0:%.*]], <i64 56, i64 55>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[TMP2]])
+; CHECK-NEXT: ret <2 x i64> [[TMP3]]
+;
+ %2 = shl <2 x i64> %0, <i64 56, i64 55> ; second elem has 9 active high bits
+ %3 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %2)
+ ret <2 x i64> %3
+}
+
+; negative test
+define <2 x i64> @bs_active_high_undef(<2 x i64> %0) {
+; CHECK-LABEL: @bs_active_high_undef(
+; CHECK-NEXT: [[TMP2:%.*]] = shl <2 x i64> [[TMP0:%.*]], <i64 56, i64 undef>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[TMP2]])
+; CHECK-NEXT: ret <2 x i64> [[TMP3]]
+;
+ %2 = shl <2 x i64> %0, <i64 56, i64 undef>
+ %3 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %2)
+ ret <2 x i64> %3
+}
+
+define i64 @bs_active_high8_multiuse(i64 %0) {
+; CHECK-LABEL: @bs_active_high8_multiuse(
+; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP0:%.*]], 56
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: ret i64 [[TMP4]]
+;
+ %2 = shl i64 %0, 56
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ %4 = mul i64 %2, %3 ; increase use of shl and bswap
+ ret i64 %4
+}
+
+define i64 @bs_active_high7_multiuse(i64 %0) {
+; CHECK-LABEL: @bs_active_high7_multiuse(
+; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP0:%.*]], 57
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: ret i64 [[TMP4]]
+;
+ %2 = shl i64 %0, 57
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ %4 = mul i64 %2, %3 ; increase use of shl and bswap
+ ret i64 %4
+}
+
+define i64 @bs_active_byte_6h(i64 %0) {
+; CHECK-LABEL: @bs_active_byte_6h(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 280375465082880
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: ret i64 [[TMP3]]
+;
+ %2 = and i64 %0, 280375465082880 ; 0xff00'00000000
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+define i32 @bs_active_byte_3h(i32 %0) {
+; CHECK-LABEL: @bs_active_byte_3h(
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP0:%.*]], 393216
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
+ %2 = and i32 %0, 393216 ; 0x0006'0000
+ %3 = call i32 @llvm.bswap.i32(i32 %2)
+ ret i32 %3
+}
+
+define <2 x i32> @bs_active_byte_3h_v2(<2 x i32> %0) {
+; CHECK-LABEL: @bs_active_byte_3h_v2(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 8388608, i32 65536>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+;
+ %2 = and <2 x i32> %0, <i32 8388608, i32 65536> ; 0x0080'0000, 0x0001'0000
+ %3 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %2)
+ ret <2 x i32> %3
+}
+
+; negative test
+define i64 @bs_active_byte_78h(i64 %0) {
+; CHECK-LABEL: @bs_active_byte_78h(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 108086391056891904
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: ret i64 [[TMP3]]
+;
+ %2 = and i64 %0, 108086391056891904 ; 0x01800000'00000000
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+
+define i16 @bs_active_low1(i16 %0) {
+; CHECK-LABEL: @bs_active_low1(
+; CHECK-NEXT: [[TMP2:%.*]] = lshr i16 [[TMP0:%.*]], 15
+; CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
+; CHECK-NEXT: ret i16 [[TMP3]]
+;
+ %2 = lshr i16 %0, 15
+ %3 = call i16 @llvm.bswap.i16(i16 %2)
+ ret i16 %3
+}
+
+define <2 x i32> @bs_active_low8(<2 x i32> %0) {
+; CHECK-LABEL: @bs_active_low8(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 255, i32 255>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+;
+ %2 = and <2 x i32> %0, <i32 255, i32 255>
+ %3 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %2)
+ ret <2 x i32> %3
+}
+
+define <2 x i32> @bs_active_low_
diff erent(<2 x i32> %0) {
+; CHECK-LABEL: @bs_active_low_
diff erent(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 2, i32 128>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+;
+ %2 = and <2 x i32> %0, <i32 2, i32 128>
+ %3 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %2)
+ ret <2 x i32> %3
+}
+
+; negative test
+define <2 x i32> @bs_active_low_
diff erent_negative(<2 x i32> %0) {
+; CHECK-LABEL: @bs_active_low_
diff erent_negative(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 256, i32 255>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+;
+ %2 = and <2 x i32> %0, <i32 256, i32 255>
+ %3 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %2)
+ ret <2 x i32> %3
+}
+
+; negative test
+define <2 x i32> @bs_active_low_undef(<2 x i32> %0) {
+; CHECK-LABEL: @bs_active_low_undef(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i32> [[TMP0:%.*]], <i32 255, i32 undef>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
+;
+ %2 = and <2 x i32> %0, <i32 255, i32 undef>
+ %3 = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %2)
+ ret <2 x i32> %3
+}
+
+define i64 @bs_active_low8_multiuse(i64 %0) {
+; CHECK-LABEL: @bs_active_low8_multiuse(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 255
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: ret i64 [[TMP4]]
+;
+ %2 = and i64 %0, 255
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ %4 = mul i64 %2, %3 ; increase use of and and bswap
+ ret i64 %4
+}
+
+define i64 @bs_active_low7_multiuse(i64 %0) {
+; CHECK-LABEL: @bs_active_low7_multiuse(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 127
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP2]], [[TMP3]]
+; CHECK-NEXT: ret i64 [[TMP4]]
+;
+ %2 = and i64 %0, 127
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ %4 = mul i64 %2, %3 ; increase use of and and bswap
+ ret i64 %4
+}
+
+define i64 @bs_active_byte_4l(i64 %0) {
+; CHECK-LABEL: @bs_active_byte_4l(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 1140850688
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: ret i64 [[TMP3]]
+;
+ %2 = and i64 %0, 1140850688 ; 0x44000000
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+define i32 @bs_active_byte_2l(i32 %0) {
+; CHECK-LABEL: @bs_active_byte_2l(
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP0:%.*]], 65280
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
+ %2 = and i32 %0, 65280 ; 0xff00
+ %3 = call i32 @llvm.bswap.i32(i32 %2)
+ ret i32 %3
+}
+
+define <2 x i64> @bs_active_byte_2l_v2(<2 x i64> %0) {
+; CHECK-LABEL: @bs_active_byte_2l_v2(
+; CHECK-NEXT: [[TMP2:%.*]] = and <2 x i64> [[TMP0:%.*]], <i64 256, i64 65280>
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> [[TMP2]])
+; CHECK-NEXT: ret <2 x i64> [[TMP3]]
+;
+ %2 = and <2 x i64> %0, <i64 256, i64 65280> ; 0x0100, 0xff00
+ %3 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %2)
+ ret <2 x i64> %3
+}
+
+; negative test
+define i64 @bs_active_byte_12l(i64 %0) {
+; CHECK-LABEL: @bs_active_byte_12l(
+; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP0:%.*]], 384
+; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
+; CHECK-NEXT: ret i64 [[TMP3]]
+;
+ %2 = and i64 %0, 384 ; 0x0180
+ %3 = call i64 @llvm.bswap.i64(i64 %2)
+ ret i64 %3
+}
+
+
declare i16 @llvm.bswap.i16(i16)
declare i32 @llvm.bswap.i32(i32)
declare i64 @llvm.bswap.i64(i64)
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