[llvm] 237502c - AMDGPU: Fix asm in test using wrong IR type for physical register

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-01-20T12:56:53-05:00
New Revision: 237502c1a478a68ee4a0e173efc2d4684e58d0bb

URL: https://github.com/llvm/llvm-project/commit/237502c1a478a68ee4a0e173efc2d4684e58d0bb
DIFF: https://github.com/llvm/llvm-project/commit/237502c1a478a68ee4a0e173efc2d4684e58d0bb.diff

LOG: AMDGPU: Fix asm in test using wrong IR type for physical register

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll b/llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
index c4c887b1906a..91d2ec82c81e 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
@@ -55,14 +55,14 @@ define amdgpu_kernel void @test() #1 {
 ; GFX10-NEXT:    s_waitcnt_depctr 0xffe3
 ; GFX10-NEXT:    s_mov_b64 exec, s[6:7]
 ; GFX10-NEXT:    ;;#ASMSTART
-; GFX10-NEXT:    ; use s[0:3]
+; GFX10-NEXT:    ; use s[0:4]
 ; GFX10-NEXT:    ;;#ASMEND
 ; GFX10-NEXT:    s_endpgm
   %wide.sgpr0 = call <8 x i32> asm sideeffect "; def $0", "={s[0:7]}" () #0
-  %wide.sgpr2 = call <4 x i32> asm sideeffect "; def $0", "={s[8:12]}" () #0
+  %wide.sgpr2 = call <5 x i32> asm sideeffect "; def $0", "={s[8:12]}" () #0
   call void asm sideeffect "", "~{v[0:7]}" () #0
   call void asm sideeffect "; use $0", "s"(<8 x i32> %wide.sgpr0) #0
-  call void asm sideeffect "; use $0", "s"(<4 x i32> %wide.sgpr2) #0
+  call void asm sideeffect "; use $0", "s"(<5 x i32> %wide.sgpr2) #0
   ret void
 }