[PATCH] D117804: [TargetLowering][InstCombine] Simplify BSwap demanded bits code a little. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 20 09:48:21 PST 2022
craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, lebedev.ri.
Herald added a subscriber: hiraditya.
craig.topper requested review of this revision.
Herald added a project: LLVM.
Use alignDown instead of &= ~7.
Replace ResultBit with NLZ. (BitWidth - NLZ - NTZ == 8) so
(BitWidth - NTZ - 8 == NLZ).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117804
Files:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Index: llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -800,22 +800,19 @@
// Round NTZ down to the next byte. If we have 11 trailing zeros, then
// we need all the bits down to bit 8. Likewise, round NLZ. If we
// have 14 leading zeros, round to 8.
- NLZ &= ~7;
- NTZ &= ~7;
+ NLZ = alignDown(NLZ, 8);
+ NTZ = alignDown(NTZ, 8);
// If we need exactly one byte, we can do this transformation.
if (BitWidth-NLZ-NTZ == 8) {
- unsigned ResultBit = NTZ;
- unsigned InputBit = BitWidth-NTZ-8;
-
// Replace this with either a left or right shift to get the byte into
// the right place.
Instruction *NewVal;
- if (InputBit > ResultBit)
+ if (NLZ > NTZ)
NewVal = BinaryOperator::CreateLShr(II->getArgOperand(0),
- ConstantInt::get(I->getType(), InputBit-ResultBit));
+ ConstantInt::get(I->getType(), NLZ - NTZ));
else
NewVal = BinaryOperator::CreateShl(II->getArgOperand(0),
- ConstantInt::get(I->getType(), ResultBit-InputBit));
+ ConstantInt::get(I->getType(), NTZ - NLZ));
NewVal->takeName(I);
return InsertNewInstWith(NewVal, *I);
}
Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1815,20 +1815,16 @@
// Round NTZ down to the next byte. If we have 11 trailing zeros, then
// we need all the bits down to bit 8. Likewise, round NLZ. If we
// have 14 leading zeros, round to 8.
- NLZ &= ~7;
- NTZ &= ~7;
+ NLZ = alignDown(NLZ, 8);
+ NTZ = alignDown(NTZ, 8);
// If we need exactly one byte, we can do this transformation.
if (BitWidth - NLZ - NTZ == 8) {
- unsigned ResultBit = NTZ;
- unsigned InputBit = BitWidth - NTZ - 8;
-
// Replace this with either a left or right shift to get the byte into
// the right place.
- unsigned ShiftOpcode = InputBit > ResultBit ? ISD::SRL : ISD::SHL;
+ unsigned ShiftOpcode = NLZ > NTZ ? ISD::SRL : ISD::SHL;
if (!TLO.LegalOperations() || isOperationLegal(ShiftOpcode, VT)) {
EVT ShiftAmtTy = getShiftAmountTy(VT, DL);
- unsigned ShiftAmount =
- InputBit > ResultBit ? InputBit - ResultBit : ResultBit - InputBit;
+ unsigned ShiftAmount = NLZ > NTZ ? NLZ - NTZ : NTZ - NLZ;
SDValue ShAmt = TLO.DAG.getConstant(ShiftAmount, dl, ShiftAmtTy);
SDValue NewOp = TLO.DAG.getNode(ShiftOpcode, dl, VT, Src, ShAmt);
return TLO.CombineTo(Op, NewOp);
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