[PATCH] D117680: [InstCombine] Simplify bswap -> shift

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp:1194
+
+    // bswap(x) -> shl(x) if x has at most 8 (byte) active bits
+    if (Known.countMaxActiveBits() <= 8)
----------------
craig.topper wrote:
> Can this go further.
> 
> Something like
> 
> ```
> unsigned TZ = alignDown(Known.countMinTrailingZeros(), 8);
> unsigned LZ = alignDown(Known.countMinLeadingZeros(), 8);
> 
> if (BitWidth - TZ - LZ == 8) {
>   if ((BitWidth - LZ - 8) > TZ)
>     ShiftRight by ((BitWidth - LZ - 8)  - TZ)
>   else
>     ShiftLeft by (TZ - (BitWidth - LZ - 8))
> }
> ```
> 
> Adapted from the SimplifyDemandedBits for bswap like https://reviews.llvm.org/D117508
Oops that should be

```
unsigned TZ = alignDown(Known.countMinTrailingZeros(), 8);
unsigned LZ = alignDown(Known.countMinLeadingZeros(), 8);

if (BitWidth - TZ - LZ == 8) {
  if ((BitWidth - TZ - 8) > TZ)
    ShiftRight by ((BitWidth - TZ - 8)  - TZ)
  else
    ShiftLeft by (TZ - (BitWidth - TZ - 8))
}
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117680/new/

https://reviews.llvm.org/D117680