[llvm] a4ac40e - [AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs.
Simon Tatham via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 20 05:38:13 PST 2022
Author: Simon Tatham
Date: 2022-01-20T13:37:58Z
New Revision: a4ac40e92f718d487898bd204517c38113afd3bb
URL: https://github.com/llvm/llvm-project/commit/a4ac40e92f718d487898bd204517c38113afd3bb
DIFF: https://github.com/llvm/llvm-project/commit/a4ac40e92f718d487898bd204517c38113afd3bb.diff
LOG: [AArch64] Remove PRBAR0_ELn and PRLAR0_ELn sysregs.
The Armv8-R.64 architecture defines numbered MPU region registers with
indices 1-15, not 0-15. So there's no such register as PRBAR0_EL2 or
PRLAR0_EL1 (for example). The encodings that they would occupy are
used for the unnumbered PRBAR_ELn and PRLAR_ELn registers.
Reviewed By: labrinea
Differential Revision: https://reviews.llvm.org/D117755
Added:
Modified:
llvm/lib/Target/AArch64/AArch64SystemOperands.td
llvm/test/MC/AArch64/armv8r-sysreg.s
llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index f9fe804865a5a..cce5813fe6e9d 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -1333,7 +1333,7 @@ def : RWSysReg<"PRBAR_EL2", 0b11, 0b100, 0b0110, 0b1000, 0b000>;
def : RWSysReg<"PRLAR_EL1", 0b11, 0b000, 0b0110, 0b1000, 0b001>;
def : RWSysReg<"PRLAR_EL2", 0b11, 0b100, 0b0110, 0b1000, 0b001>;
-foreach n = 0-15 in {
+foreach n = 1-15 in {
foreach x = 1-2 in {
//Direct acces to Protection Region Base Address Register for n th MPU region
def : RWSysReg<!strconcat("PRBAR"#n, "_EL"#x),
@@ -1348,7 +1348,7 @@ foreach x = 1-2 in {
let Encoding{13} = !add(x,-1);
}
} //foreach x = 1-2 in
-} //foreach n = 0-15 in
+} //foreach n = 1-15 in
} //let Requires = [{ {AArch64::HasV8_0rOps} }] in
// v8.1a "Privileged Access Never" extension-specific system registers
diff --git a/llvm/test/MC/AArch64/armv8r-sysreg.s b/llvm/test/MC/AArch64/armv8r-sysreg.s
index 7de43b7c2e848..0f9cb05622d2a 100644
--- a/llvm/test/MC/AArch64/armv8r-sysreg.s
+++ b/llvm/test/MC/AArch64/armv8r-sysreg.s
@@ -11,7 +11,6 @@ mrs x0, PRBAR_EL1
mrs x0, PRBAR_EL2
mrs x0, PRLAR_EL1
mrs x0, PRLAR_EL2
-mrs x0, PRBAR0_EL1
mrs x0, PRBAR1_EL1
mrs x0, PRBAR2_EL1
mrs x0, PRBAR3_EL1
@@ -27,7 +26,6 @@ mrs x0, PRBAR12_EL1
mrs x0, PRBAR13_EL1
mrs x0, PRBAR14_EL1
mrs x0, PRBAR15_EL1
-mrs x0, PRLAR0_EL1
mrs x0, PRLAR1_EL1
mrs x0, PRLAR2_EL1
mrs x0, PRLAR3_EL1
@@ -43,7 +41,6 @@ mrs x0, PRLAR12_EL1
mrs x0, PRLAR13_EL1
mrs x0, PRLAR14_EL1
mrs x0, PRLAR15_EL1
-mrs x0, PRBAR0_EL2
mrs x0, PRBAR1_EL2
mrs x0, PRBAR2_EL2
mrs x0, PRBAR3_EL2
@@ -59,7 +56,6 @@ mrs x0, PRBAR12_EL2
mrs x0, PRBAR13_EL2
mrs x0, PRBAR14_EL2
mrs x0, PRBAR15_EL2
-mrs x0, PRLAR0_EL2
mrs x0, PRLAR1_EL2
mrs x0, PRLAR2_EL2
mrs x0, PRLAR3_EL2
@@ -86,7 +82,6 @@ mrs x30, PRBAR_EL1
mrs x30, PRBAR_EL2
mrs x30, PRLAR_EL1
mrs x30, PRLAR_EL2
-mrs x30, PRBAR0_EL1
mrs x30, PRBAR1_EL1
mrs x30, PRBAR2_EL1
mrs x30, PRBAR3_EL1
@@ -102,7 +97,6 @@ mrs x30, PRBAR12_EL1
mrs x30, PRBAR13_EL1
mrs x30, PRBAR14_EL1
mrs x30, PRBAR15_EL1
-mrs x30, PRLAR0_EL1
mrs x30, PRLAR1_EL1
mrs x30, PRLAR2_EL1
mrs x30, PRLAR3_EL1
@@ -118,7 +112,6 @@ mrs x30, PRLAR12_EL1
mrs x30, PRLAR13_EL1
mrs x30, PRLAR14_EL1
mrs x30, PRLAR15_EL1
-mrs x30, PRBAR0_EL2
mrs x30, PRBAR1_EL2
mrs x30, PRBAR2_EL2
mrs x30, PRBAR3_EL2
@@ -134,7 +127,6 @@ mrs x30, PRBAR12_EL2
mrs x30, PRBAR13_EL2
mrs x30, PRBAR14_EL2
mrs x30, PRBAR15_EL2
-mrs x30, PRLAR0_EL2
mrs x30, PRLAR1_EL2
mrs x30, PRLAR2_EL2
mrs x30, PRLAR3_EL2
@@ -161,7 +153,6 @@ msr PRBAR_EL1, x0
msr PRBAR_EL2, x0
msr PRLAR_EL1, x0
msr PRLAR_EL2, x0
-msr PRBAR0_EL1, x0
msr PRBAR1_EL1, x0
msr PRBAR2_EL1, x0
msr PRBAR3_EL1, x0
@@ -177,7 +168,6 @@ msr PRBAR12_EL1, x0
msr PRBAR13_EL1, x0
msr PRBAR14_EL1, x0
msr PRBAR15_EL1, x0
-msr PRLAR0_EL1, x0
msr PRLAR1_EL1, x0
msr PRLAR2_EL1, x0
msr PRLAR3_EL1, x0
@@ -193,7 +183,6 @@ msr PRLAR12_EL1, x0
msr PRLAR13_EL1, x0
msr PRLAR14_EL1, x0
msr PRLAR15_EL1, x0
-msr PRBAR0_EL2, x0
msr PRBAR1_EL2, x0
msr PRBAR2_EL2, x0
msr PRBAR3_EL2, x0
@@ -209,7 +198,6 @@ msr PRBAR12_EL2, x0
msr PRBAR13_EL2, x0
msr PRBAR14_EL2, x0
msr PRBAR15_EL2, x0
-msr PRLAR0_EL2, x0
msr PRLAR1_EL2, x0
msr PRLAR2_EL2, x0
msr PRLAR3_EL2, x0
@@ -236,7 +224,6 @@ msr PRBAR_EL1, x30
msr PRBAR_EL2, x30
msr PRLAR_EL1, x30
msr PRLAR_EL2, x30
-msr PRBAR0_EL1, x30
msr PRBAR1_EL1, x30
msr PRBAR2_EL1, x30
msr PRBAR3_EL1, x30
@@ -252,7 +239,6 @@ msr PRBAR12_EL1, x30
msr PRBAR13_EL1, x30
msr PRBAR14_EL1, x30
msr PRBAR15_EL1, x30
-msr PRLAR0_EL1, x30
msr PRLAR1_EL1, x30
msr PRLAR2_EL1, x30
msr PRLAR3_EL1, x30
@@ -268,7 +254,6 @@ msr PRLAR12_EL1, x30
msr PRLAR13_EL1, x30
msr PRLAR14_EL1, x30
msr PRLAR15_EL1, x30
-msr PRBAR0_EL2, x30
msr PRBAR1_EL2, x30
msr PRBAR2_EL2, x30
msr PRBAR3_EL2, x30
@@ -284,7 +269,6 @@ msr PRBAR12_EL2, x30
msr PRBAR13_EL2, x30
msr PRBAR14_EL2, x30
msr PRBAR15_EL2, x30
-msr PRLAR0_EL2, x30
msr PRLAR1_EL2, x30
msr PRLAR2_EL2, x30
msr PRLAR3_EL2, x30
@@ -310,11 +294,10 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x0, PRENR_EL2 // encoding: [0x20,0x61,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRSELR_EL1 // encoding: [0x20,0x62,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRSELR_EL2 // encoding: [0x20,0x62,0x3c,0xd5]
-# CHECK-NEXT: mrs x0, PRBAR0_EL1 // encoding: [0x00,0x68,0x38,0xd5]
-# CHECK-NEXT: mrs x0, PRBAR0_EL2 // encoding: [0x00,0x68,0x3c,0xd5]
-# CHECK-NEXT: mrs x0, PRLAR0_EL1 // encoding: [0x20,0x68,0x38,0xd5]
-# CHECK-NEXT: mrs x0, PRLAR0_EL2 // encoding: [0x20,0x68,0x3c,0xd5]
-# CHECK-NEXT: mrs x0, PRBAR0_EL1 // encoding: [0x00,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x0, PRBAR_EL1 // encoding: [0x00,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x0, PRBAR_EL2 // encoding: [0x00,0x68,0x3c,0xd5]
+# CHECK-NEXT: mrs x0, PRLAR_EL1 // encoding: [0x20,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x0, PRLAR_EL2 // encoding: [0x20,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR1_EL1 // encoding: [0x80,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRBAR2_EL1 // encoding: [0x00,0x69,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRBAR3_EL1 // encoding: [0x80,0x69,0x38,0xd5]
@@ -330,7 +313,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x0, PRBAR13_EL1 // encoding: [0x80,0x6e,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRBAR14_EL1 // encoding: [0x00,0x6f,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRBAR15_EL1 // encoding: [0x80,0x6f,0x38,0xd5]
-# CHECK-NEXT: mrs x0, PRLAR0_EL1 // encoding: [0x20,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRLAR1_EL1 // encoding: [0xa0,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRLAR2_EL1 // encoding: [0x20,0x69,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRLAR3_EL1 // encoding: [0xa0,0x69,0x38,0xd5]
@@ -346,7 +328,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x0, PRLAR13_EL1 // encoding: [0xa0,0x6e,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRLAR14_EL1 // encoding: [0x20,0x6f,0x38,0xd5]
# CHECK-NEXT: mrs x0, PRLAR15_EL1 // encoding: [0xa0,0x6f,0x38,0xd5]
-# CHECK-NEXT: mrs x0, PRBAR0_EL2 // encoding: [0x00,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR1_EL2 // encoding: [0x80,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR2_EL2 // encoding: [0x00,0x69,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR3_EL2 // encoding: [0x80,0x69,0x3c,0xd5]
@@ -362,7 +343,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x0, PRBAR13_EL2 // encoding: [0x80,0x6e,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR14_EL2 // encoding: [0x00,0x6f,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRBAR15_EL2 // encoding: [0x80,0x6f,0x3c,0xd5]
-# CHECK-NEXT: mrs x0, PRLAR0_EL2 // encoding: [0x20,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRLAR1_EL2 // encoding: [0xa0,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRLAR2_EL2 // encoding: [0x20,0x69,0x3c,0xd5]
# CHECK-NEXT: mrs x0, PRLAR3_EL2 // encoding: [0xa0,0x69,0x3c,0xd5]
@@ -385,11 +365,10 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x30, PRENR_EL2 // encoding: [0x3e,0x61,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRSELR_EL1 // encoding: [0x3e,0x62,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRSELR_EL2 // encoding: [0x3e,0x62,0x3c,0xd5]
-# CHECK-NEXT: mrs x30, PRBAR0_EL1 // encoding: [0x1e,0x68,0x38,0xd5]
-# CHECK-NEXT: mrs x30, PRBAR0_EL2 // encoding: [0x1e,0x68,0x3c,0xd5]
-# CHECK-NEXT: mrs x30, PRLAR0_EL1 // encoding: [0x3e,0x68,0x38,0xd5]
-# CHECK-NEXT: mrs x30, PRLAR0_EL2 // encoding: [0x3e,0x68,0x3c,0xd5]
-# CHECK-NEXT: mrs x30, PRBAR0_EL1 // encoding: [0x1e,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x30, PRBAR_EL1 // encoding: [0x1e,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x30, PRBAR_EL2 // encoding: [0x1e,0x68,0x3c,0xd5]
+# CHECK-NEXT: mrs x30, PRLAR_EL1 // encoding: [0x3e,0x68,0x38,0xd5]
+# CHECK-NEXT: mrs x30, PRLAR_EL2 // encoding: [0x3e,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR1_EL1 // encoding: [0x9e,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRBAR2_EL1 // encoding: [0x1e,0x69,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRBAR3_EL1 // encoding: [0x9e,0x69,0x38,0xd5]
@@ -405,7 +384,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x30, PRBAR13_EL1 // encoding: [0x9e,0x6e,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRBAR14_EL1 // encoding: [0x1e,0x6f,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRBAR15_EL1 // encoding: [0x9e,0x6f,0x38,0xd5]
-# CHECK-NEXT: mrs x30, PRLAR0_EL1 // encoding: [0x3e,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRLAR1_EL1 // encoding: [0xbe,0x68,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRLAR2_EL1 // encoding: [0x3e,0x69,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRLAR3_EL1 // encoding: [0xbe,0x69,0x38,0xd5]
@@ -421,7 +399,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x30, PRLAR13_EL1 // encoding: [0xbe,0x6e,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRLAR14_EL1 // encoding: [0x3e,0x6f,0x38,0xd5]
# CHECK-NEXT: mrs x30, PRLAR15_EL1 // encoding: [0xbe,0x6f,0x38,0xd5]
-# CHECK-NEXT: mrs x30, PRBAR0_EL2 // encoding: [0x1e,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR1_EL2 // encoding: [0x9e,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR2_EL2 // encoding: [0x1e,0x69,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR3_EL2 // encoding: [0x9e,0x69,0x3c,0xd5]
@@ -437,7 +414,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: mrs x30, PRBAR13_EL2 // encoding: [0x9e,0x6e,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR14_EL2 // encoding: [0x1e,0x6f,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRBAR15_EL2 // encoding: [0x9e,0x6f,0x3c,0xd5]
-# CHECK-NEXT: mrs x30, PRLAR0_EL2 // encoding: [0x3e,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRLAR1_EL2 // encoding: [0xbe,0x68,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRLAR2_EL2 // encoding: [0x3e,0x69,0x3c,0xd5]
# CHECK-NEXT: mrs x30, PRLAR3_EL2 // encoding: [0xbe,0x69,0x3c,0xd5]
@@ -460,11 +436,10 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRENR_EL2, x0 // encoding: [0x20,0x61,0x1c,0xd5]
# CHECK-NEXT: msr PRSELR_EL1, x0 // encoding: [0x20,0x62,0x18,0xd5]
# CHECK-NEXT: msr PRSELR_EL2, x0 // encoding: [0x20,0x62,0x1c,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL1, x0 // encoding: [0x00,0x68,0x18,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL2, x0 // encoding: [0x00,0x68,0x1c,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL1, x0 // encoding: [0x20,0x68,0x18,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL2, x0 // encoding: [0x20,0x68,0x1c,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL1, x0 // encoding: [0x00,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRBAR_EL1, x0 // encoding: [0x00,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRBAR_EL2, x0 // encoding: [0x00,0x68,0x1c,0xd5]
+# CHECK-NEXT: msr PRLAR_EL1, x0 // encoding: [0x20,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRLAR_EL2, x0 // encoding: [0x20,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR1_EL1, x0 // encoding: [0x80,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRBAR2_EL1, x0 // encoding: [0x00,0x69,0x18,0xd5]
# CHECK-NEXT: msr PRBAR3_EL1, x0 // encoding: [0x80,0x69,0x18,0xd5]
@@ -480,7 +455,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRBAR13_EL1, x0 // encoding: [0x80,0x6e,0x18,0xd5]
# CHECK-NEXT: msr PRBAR14_EL1, x0 // encoding: [0x00,0x6f,0x18,0xd5]
# CHECK-NEXT: msr PRBAR15_EL1, x0 // encoding: [0x80,0x6f,0x18,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL1, x0 // encoding: [0x20,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRLAR1_EL1, x0 // encoding: [0xa0,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRLAR2_EL1, x0 // encoding: [0x20,0x69,0x18,0xd5]
# CHECK-NEXT: msr PRLAR3_EL1, x0 // encoding: [0xa0,0x69,0x18,0xd5]
@@ -496,7 +470,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRLAR13_EL1, x0 // encoding: [0xa0,0x6e,0x18,0xd5]
# CHECK-NEXT: msr PRLAR14_EL1, x0 // encoding: [0x20,0x6f,0x18,0xd5]
# CHECK-NEXT: msr PRLAR15_EL1, x0 // encoding: [0xa0,0x6f,0x18,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL2, x0 // encoding: [0x00,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR1_EL2, x0 // encoding: [0x80,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR2_EL2, x0 // encoding: [0x00,0x69,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR3_EL2, x0 // encoding: [0x80,0x69,0x1c,0xd5]
@@ -512,7 +485,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRBAR13_EL2, x0 // encoding: [0x80,0x6e,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR14_EL2, x0 // encoding: [0x00,0x6f,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR15_EL2, x0 // encoding: [0x80,0x6f,0x1c,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL2, x0 // encoding: [0x20,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR1_EL2, x0 // encoding: [0xa0,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR2_EL2, x0 // encoding: [0x20,0x69,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR3_EL2, x0 // encoding: [0xa0,0x69,0x1c,0xd5]
@@ -535,11 +507,10 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRENR_EL2, x30 // encoding: [0x3e,0x61,0x1c,0xd5]
# CHECK-NEXT: msr PRSELR_EL1, x30 // encoding: [0x3e,0x62,0x18,0xd5]
# CHECK-NEXT: msr PRSELR_EL2, x30 // encoding: [0x3e,0x62,0x1c,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL1, x30 // encoding: [0x1e,0x68,0x18,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL2, x30 // encoding: [0x1e,0x68,0x1c,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL1, x30 // encoding: [0x3e,0x68,0x18,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL2, x30 // encoding: [0x3e,0x68,0x1c,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL1, x30 // encoding: [0x1e,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRBAR_EL1, x30 // encoding: [0x1e,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRBAR_EL2, x30 // encoding: [0x1e,0x68,0x1c,0xd5]
+# CHECK-NEXT: msr PRLAR_EL1, x30 // encoding: [0x3e,0x68,0x18,0xd5]
+# CHECK-NEXT: msr PRLAR_EL2, x30 // encoding: [0x3e,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR1_EL1, x30 // encoding: [0x9e,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRBAR2_EL1, x30 // encoding: [0x1e,0x69,0x18,0xd5]
# CHECK-NEXT: msr PRBAR3_EL1, x30 // encoding: [0x9e,0x69,0x18,0xd5]
@@ -555,7 +526,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRBAR13_EL1, x30 // encoding: [0x9e,0x6e,0x18,0xd5]
# CHECK-NEXT: msr PRBAR14_EL1, x30 // encoding: [0x1e,0x6f,0x18,0xd5]
# CHECK-NEXT: msr PRBAR15_EL1, x30 // encoding: [0x9e,0x6f,0x18,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL1, x30 // encoding: [0x3e,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRLAR1_EL1, x30 // encoding: [0xbe,0x68,0x18,0xd5]
# CHECK-NEXT: msr PRLAR2_EL1, x30 // encoding: [0x3e,0x69,0x18,0xd5]
# CHECK-NEXT: msr PRLAR3_EL1, x30 // encoding: [0xbe,0x69,0x18,0xd5]
@@ -571,7 +541,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRLAR13_EL1, x30 // encoding: [0xbe,0x6e,0x18,0xd5]
# CHECK-NEXT: msr PRLAR14_EL1, x30 // encoding: [0x3e,0x6f,0x18,0xd5]
# CHECK-NEXT: msr PRLAR15_EL1, x30 // encoding: [0xbe,0x6f,0x18,0xd5]
-# CHECK-NEXT: msr PRBAR0_EL2, x30 // encoding: [0x1e,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR1_EL2, x30 // encoding: [0x9e,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR2_EL2, x30 // encoding: [0x1e,0x69,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR3_EL2, x30 // encoding: [0x9e,0x69,0x1c,0xd5]
@@ -587,7 +556,6 @@ msr CONTEXTIDR_EL2, x0
# CHECK-NEXT: msr PRBAR13_EL2, x30 // encoding: [0x9e,0x6e,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR14_EL2, x30 // encoding: [0x1e,0x6f,0x1c,0xd5]
# CHECK-NEXT: msr PRBAR15_EL2, x30 // encoding: [0x9e,0x6f,0x1c,0xd5]
-# CHECK-NEXT: msr PRLAR0_EL2, x30 // encoding: [0x3e,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR1_EL2, x30 // encoding: [0xbe,0x68,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR2_EL2, x30 // encoding: [0x3e,0x69,0x1c,0xd5]
# CHECK-NEXT: msr PRLAR3_EL2, x30 // encoding: [0xbe,0x69,0x1c,0xd5]
diff --git a/llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt b/llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt
index 2b88df5c24de3..ba675c6de532b 100644
--- a/llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt
+++ b/llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt
@@ -294,10 +294,10 @@
// CHECK-NEXT: mrs x0, PRENR_EL2
// CHECK-NEXT: mrs x0, PRSELR_EL1
// CHECK-NEXT: mrs x0, PRSELR_EL2
-// CHECK-NEXT: mrs x0, PRBAR0_EL1
-// CHECK-NEXT: mrs x0, PRBAR0_EL2
-// CHECK-NEXT: mrs x0, PRLAR0_EL1
-// CHECK-NEXT: mrs x0, PRLAR0_EL2
+// CHECK-NEXT: mrs x0, PRBAR_EL1
+// CHECK-NEXT: mrs x0, PRBAR_EL2
+// CHECK-NEXT: mrs x0, PRLAR_EL1
+// CHECK-NEXT: mrs x0, PRLAR_EL2
// CHECK-NEXT: mrs x0, PRBAR1_EL1
// CHECK-NEXT: mrs x0, PRBAR2_EL1
// CHECK-NEXT: mrs x0, PRBAR3_EL1
@@ -365,10 +365,10 @@
// CHECK-NEXT: mrs x30, PRENR_EL2
// CHECK-NEXT: mrs x30, PRSELR_EL1
// CHECK-NEXT: mrs x30, PRSELR_EL2
-// CHECK-NEXT: mrs x30, PRBAR0_EL1
-// CHECK-NEXT: mrs x30, PRBAR0_EL2
-// CHECK-NEXT: mrs x30, PRLAR0_EL1
-// CHECK-NEXT: mrs x30, PRLAR0_EL2
+// CHECK-NEXT: mrs x30, PRBAR_EL1
+// CHECK-NEXT: mrs x30, PRBAR_EL2
+// CHECK-NEXT: mrs x30, PRLAR_EL1
+// CHECK-NEXT: mrs x30, PRLAR_EL2
// CHECK-NEXT: mrs x30, PRBAR1_EL1
// CHECK-NEXT: mrs x30, PRBAR2_EL1
// CHECK-NEXT: mrs x30, PRBAR3_EL1
@@ -436,10 +436,10 @@
// CHECK-NEXT: msr PRENR_EL2, x0
// CHECK-NEXT: msr PRSELR_EL1, x0
// CHECK-NEXT: msr PRSELR_EL2, x0
-// CHECK-NEXT: msr PRBAR0_EL1, x0
-// CHECK-NEXT: msr PRBAR0_EL2, x0
-// CHECK-NEXT: msr PRLAR0_EL1, x0
-// CHECK-NEXT: msr PRLAR0_EL2, x0
+// CHECK-NEXT: msr PRBAR_EL1, x0
+// CHECK-NEXT: msr PRBAR_EL2, x0
+// CHECK-NEXT: msr PRLAR_EL1, x0
+// CHECK-NEXT: msr PRLAR_EL2, x0
// CHECK-NEXT: msr PRBAR1_EL1, x0
// CHECK-NEXT: msr PRBAR2_EL1, x0
// CHECK-NEXT: msr PRBAR3_EL1, x0
@@ -507,10 +507,10 @@
// CHECK-NEXT: msr PRENR_EL2, x30
// CHECK-NEXT: msr PRSELR_EL1, x30
// CHECK-NEXT: msr PRSELR_EL2, x30
-// CHECK-NEXT: msr PRBAR0_EL1, x30
-// CHECK-NEXT: msr PRBAR0_EL2, x30
-// CHECK-NEXT: msr PRLAR0_EL1, x30
-// CHECK-NEXT: msr PRLAR0_EL2, x30
+// CHECK-NEXT: msr PRBAR_EL1, x30
+// CHECK-NEXT: msr PRBAR_EL2, x30
+// CHECK-NEXT: msr PRLAR_EL1, x30
+// CHECK-NEXT: msr PRLAR_EL2, x30
// CHECK-NEXT: msr PRBAR1_EL1, x30
// CHECK-NEXT: msr PRBAR2_EL1, x30
// CHECK-NEXT: msr PRBAR3_EL1, x30
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