[PATCH] D117429: [AArch64] Revive optimize add/sub with immediate through MIPeepholeOpt

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

I think that even though it might no exist right now, in the future there could be a register class which is a subset of GPR64commonRegClass. The newly created reg should be choosing the common reg class of GPR64sp and the old DstReg.

Something like `MRI->constrainRegClass(NewDstReg, MRI->getRegClass(DstReg));`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117429/new/

https://reviews.llvm.org/D117429