[PATCH] D116812: [AArch64][SVE][VLS] Move extends into arguments of comparisons

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:15340-15343
+    const SDValue Ext1 = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N),
+                                     N->getValueType(0), SetCC.getOperand(0));
+    const SDValue Ext2 = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N),
+                                     N->getValueType(0), SetCC.getOperand(1));
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This doesn't look correct.  The extension type should mirror the comparison operator.  So whilst signed comparisons require the original operands to be sign-extended, unsigned comparisons will require the operands to be zero extended to match the original behaviour.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D116812/new/

https://reviews.llvm.org/D116812