[PATCH] D117640: [RISCV][RFC] add inst support of zbkb

Xinlong Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 19 23:26:14 PST 2022


VincentWu added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:613
+let Predicates = [HasStdExtZbkb] in 
+def BREV8 : RVBUnary<0b0110100, 0b00111, 0b101, OPC_OP_IMM, "brev8">;
+
----------------
craig.topper wrote:
> Interesting. GREVI called this rev.b rather than brev8. The similar single encoding of gorci in Zbb is orc.b. That seems inconsistent was that discussed during the review process.
> 
> I think we should change this predicate to HasStdExtZbpOrZbkb and make the rev.b InstAlias point to the BREV8 instruction instead of GREVI, but the rev.b alias should only be enabled with Zbp.
You're right, I was also aware of this before, but I wasn't very familiar with the b extension at that time, so I didn't change what zbkb didn't mention.

i will fix it soon


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117640/new/

https://reviews.llvm.org/D117640



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