[PATCH] D117663: [RISCV] Fix the bug in the register allocator caused by reserved BP.

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added a comment.

In D117663#3254416 <https://reviews.llvm.org/D117663#3254416>, @kito-cheng wrote:

> Share you my reduced case for that issue, did you mind add that to this patch?
>
> Command:
> `$ llc -mtriple=riscv64 -mattr=+experimental-v,+f  -riscv-v-vector-bits-min=128`
>
>   define void @foo(i32* nocapture noundef %p1) {
>   entry:
>     %vla = alloca [10 x i32], align 64
>     %0 = bitcast [10 x i32]* %vla to i8*
>     call void @llvm.lifetime.start.p0i8(i64 40, i8* nonnull %0)
>     %1 = bitcast i32* %p1 to <8 x float>*
>     %2 = load <8 x float>, <8 x float>* %1, align 32
>     %arraydecay = getelementptr inbounds [10 x i32], [10 x i32]* %vla, i64 0, i64 0
>     call void @bar(i32 noundef signext 1, i32 noundef signext 2, i32 noundef signext 3, i32 noundef signext 4, i32 noundef signext 5, i32 noundef signext 6, i32 noundef signext 7, i32 noundef signext 8, i32* noundef nonnull %arraydecay)
>     %3 = load <8 x float>, <8 x float>* %1, align 32
>     %add = fadd <8 x float> %2, %3
>     store <8 x float> %add, <8 x float>* %1, align 32
>     call void @llvm.lifetime.end.p0i8(i64 40, i8* nonnull %0)
>     ret void
>   }
>   
>   declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
>   
>   declare void @bar(i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32 noundef signext, i32* noundef)
>   
>   declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
>   
>   attributes #1 = { argmemonly mustprogress nofree nosync nounwind willreturn }

It is very helpful. Thank you!
I created a patch D117738 <https://reviews.llvm.org/D117738> for review.


Repository:
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  https://reviews.llvm.org/D117663/new/

https://reviews.llvm.org/D117663