[PATCH] D117723: [NFCI] Move cost estimation from TargetLowering to TargetTransformInfo.

[Daniil Fukalov via Phabricator via llvm-commits]

dfukalov created this revision.
dfukalov added reviewers: chandlerc, sdesmalen, spatel, david-arm, RKSimon, rampitec.
Herald added subscribers: asavonic, foad, kerbowa, pengfei, kbarton, hiraditya, nhaehnle, jvesely, nemanjai, arsenm, jholewinski.
dfukalov added inline comments.
dfukalov published this revision for review.
Herald added a project: LLVM.


================
Comment at: llvm/include/llvm/CodeGen/BasicTTIImpl.h:339
 
   InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
                                        int64_t BaseOffset, bool HasBaseReg,
----------------
I'm not sure I should make it `virtual` (as it was in TLI) and mark it override in targets...


================
Comment at: llvm/include/llvm/CodeGen/BasicTTIImpl.h:343-347
     TargetLoweringBase::AddrMode AM;
     AM.BaseGV = BaseGV;
     AM.BaseOffs = BaseOffset;
     AM.HasBaseReg = HasBaseReg;
     AM.Scale = Scale;
----------------
Perhaps TTI::getScalingFactorCost should be unified to TargetLoweringBase::AddrMode AM parameter.


TragetLowering had two last InstructionCost related `getTypeLegalizationCost()`
and `getScalingFactorCost()` members, but all other costs are processed in TTI.

E.g. it is not comfortable to use other TTI members in these two functions
overrided in a target.

Minor refactoring: `getTypeLegalizationCost()` now doesn't need DataLayout
parameter - it was always passed from TTI.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D117723

Files:
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
  llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
  llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.h

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