[PATCH] D117680: [InstCombine] Fold bswap(shl(x, C)) -> and(x, 255)

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D117680#3255028 <https://reviews.llvm.org/D117680#3255028>, @spatel wrote:

> This is one of several related patterns where we mask/shift a single byte from an end of the input:
> https://alive2.llvm.org/ce/z/dtHMVr
>
>   define i32 @bs_shl32(i32 %0) {
>     %2 = shl i32 %0, 24
>     %3 = call i32 @llvm.bswap.i32(i32 %2)
>     ret i32 %3
>   }
>   
>   define i32 @bs_lshr32(i32 %0) {
>     %2 = lshr i32 %0, 24
>     %3 = call i32 @llvm.bswap.i32(i32 %2)
>     ret i32 %3
>   }
>   
>   define i32 @bs_and32_000000ff(i32 %x) {
>     %m = and i32 %x, 255
>     %b = call i32 @llvm.bswap.i32(i32 %m)
>     ret i32 %b
>   }
>   
>   define i32 @bs_and32_ff000000(i32 %x) {
>     %m = and i32 %x, -16777216
>     %b = call i32 @llvm.bswap.i32(i32 %m)
>     ret i32 %b
>   }
>
> It might help to see a larger, motivating example in source or IR, so we know what a potentially more general solution would look like.
> The backend also misses these patterns, so we may want to mimic whatever we do in IR for codegen. I recently added a similar fold with D117508 <https://reviews.llvm.org/D117508>.

Can we do computeKnownBits().countMaxActiveBits() <= 8 -> replace with shl. If (BitWidth - computeKnownBits().countMaxTrailingZeros()) <= 8 -> replace with lshr?  If the input to the bswap happens to be a shift in the other direction, the new shift should be combined with it by existing combines to form an And.


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