[PATCH] D114800: [PowerPC] Replace MFVSRLD with MFVSRD when the vector is symmetrical

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added a comment.

Something to consider when it comes to deciding where to do something like this is that any work we do on the SDAG:

1. Will be basic-block local obviously
2. Will not be useful in the future when we switch to GISel


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D114800