[llvm] ca27b02 - [AVR] Do not clear r0 at interrupt entry

[Ayke van Laethem via llvm-commits]

Author: Ayke van Laethem
Date: 2022-01-19T14:22:13+01:00
New Revision: ca27b026f990da2e67cbcc371480af9cad6a65d7

URL: https://github.com/llvm/llvm-project/commit/ca27b026f990da2e67cbcc371480af9cad6a65d7
DIFF: https://github.com/llvm/llvm-project/commit/ca27b026f990da2e67cbcc371480af9cad6a65d7.diff

LOG: [AVR] Do not clear r0 at interrupt entry

There is no reason to do this: it's a scratch register and can therefore
hold any arbitrary value. And because it is in an interrupt, this code
is performance critical so it should be as short as possible.

I believe r0 was cleared because of the following:

 1. There used to be a bug that the cleared register was r0, not r1 as
    it should have been.
 2. This was fixed in https://reviews.llvm.org/D99467, but left the code
    to clear r0.

This patch completes D99467 by removing the `clr r0` instruction.

Differential Revision: https://reviews.llvm.org/D116756

Added: 
    

Modified: 
    llvm/lib/Target/AVR/AVRFrameLowering.cpp
    llvm/test/CodeGen/AVR/interrupts.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AVR/AVRFrameLowering.cpp b/llvm/lib/Target/AVR/AVRFrameLowering.cpp
index 6f5765e7f409..b3bc9ede205e 100644
--- a/llvm/lib/Target/AVR/AVRFrameLowering.cpp
+++ b/llvm/lib/Target/AVR/AVRFrameLowering.cpp
@@ -78,11 +78,6 @@ void AVRFrameLowering::emitPrologue(MachineFunction &MF,
     BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
         .addReg(AVR::R0, RegState::Kill)
         .setMIFlag(MachineInstr::FrameSetup);
-    BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
-        .addReg(AVR::R0, RegState::Define)
-        .addReg(AVR::R0, RegState::Kill)
-        .addReg(AVR::R0, RegState::Kill)
-        .setMIFlag(MachineInstr::FrameSetup);
     BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
         .addReg(AVR::R1, RegState::Define)
         .addReg(AVR::R1, RegState::Kill)

diff  --git a/llvm/test/CodeGen/AVR/interrupts.ll b/llvm/test/CodeGen/AVR/interrupts.ll
index 7838e352f045..2310413e75cf 100644
--- a/llvm/test/CodeGen/AVR/interrupts.ll
+++ b/llvm/test/CodeGen/AVR/interrupts.ll
@@ -9,7 +9,6 @@ define avr_intrcc void @interrupt_handler() {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -26,7 +25,6 @@ define void @interrupt_handler_via_ir_attribute() #0 {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -43,7 +41,6 @@ define avr_signalcc void @signal_handler() {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -60,7 +57,6 @@ define void @signal_handler_via_attribute() #1 {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: pop r0
 ; CHECK-NEXT: out 63, r0
@@ -77,7 +73,6 @@ define avr_intrcc void @interrupt_alloca() {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK: push r28
 ; CHECK-NEXT: push r29
@@ -112,7 +107,6 @@ define void @signal_handler_with_increment() #1 {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK-NEXT: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK-NEXT: push r24
 ; CHECK-NEXT: lds r24, count
@@ -140,7 +134,6 @@ define void @signal_handler_with_call() #1 {
 ; CHECK-NEXT: push r1
 ; CHECK-NEXT: in r0, 63
 ; CHECK-NEXT: push r0
-; CHECK-NEXT: clr r0
 ; CHECK-NEXT: clr r1
 ; CHECK-NEXT: push r18
 ; CHECK-NEXT: push r19