[PATCH] D86578: [TargetLowering] Combine known bits for icmp in SimplifySetCC (PR41182)
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 19 04:52:12 PST 2022
foad added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/wave32.ll:720
+; GFX1032: s_and_saveexec_b32 [[SAVE1:s[0-9]+]], [[SAVE2]]
+; GFX1032: s_or_saveexec_b32 [[SAVE2]], -1
; GFX1032: s_mov_b32 exec_lo, [[SAVE2]]
----------------
RKSimon wrote:
> foad wrote:
> > critson wrote:
> > > RKSimon wrote:
> > > > foad wrote:
> > > > > RKSimon wrote:
> > > > > > @foad I guess there's no good way around this if on wave32 targets - unless we duplicate the test with a 16 divergent variant?
> > > > > Let's just replace the "cmp uge 32" with "cmp uge 16", and then your patch won't affect this test at all. (@critson is that OK?) Would you like me to do that in a separate commit?
> > > > Not sure if the commit question was to me or @critson - but if you can alter the test and then ping this ticket I will rebase the patch.
> > > @foad your suggested test change seems fine to me
> > OK, please rebase on 7af959673e67256c5ba711070aca509dce794350.
> Thanks - looks like we have an equivalent issue in wqm.ll
Fixed in 0bc14a0a989fe4268b899100aafc07e3d94decbb.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86578/new/
https://reviews.llvm.org/D86578
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