[PATCH] D117640: [RISCV][RFC] add inst support of zbkb

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCV.td:156
+                AssemblerPredicate<(any_of FeatureStdExtZbp, FeatureStdExtZbkb),
+                                   "'Zbb' (Base 'B' Instructions) or "
+                                   "'Zbp' (Permutation 'B' Instructions) or "
----------------
Zbb shouldn't be here


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:371
+let Predicates = [HasStdExtZbpOrZbkb] in
 def GREVI : RVBShift_ri<0b01101, 0b101, OPC_OP_IMM, "grevi">, Sched<[]>;
+
----------------
The spec only mentions specific encodings of GREVI like brev8 and rev8 right?

You'll need to add something like the REV8_RV32 and REV8_RV64 for brev8 and leave general GREVI alone.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:481
 
-let Predicates = [HasStdExtZbp] in {
+let Predicates = [HasStdExtZbpOrZbkb] in {
 def SHFLI   : RVBShfl_ri<0b0000100, 0b001, OPC_OP_IMM, "shfli">, Sched<[]>;
----------------
The spec only mentions specific encodings of SHFLI/UNSHFLI if I'm reading right?

You'll need to add something like the REV8_RV32 and REV8_RV64 for zip/unzip and leave general GREVI alone.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117640/new/

https://reviews.llvm.org/D117640