[PATCH] D117572: [AMDGPU][NFC] Add DWARF extension support for SIMD execution
Tony Tye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 18 09:26:41 PST 2022
t-tye created this revision.
t-tye added reviewers: kzhuravl, scott.linder, zoran.zaric, b-sumner.
Herald added subscribers: kerbowa, tpr, dstuttard, yaxunl, nhaehnle, jvesely.
t-tye requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
- Add current iteration to the context of a DWARF expression evaluation.
- Add DW_AT_LLVM_iterations attribute to specify the number of iterations executing concurrently.
- Add DF_OP_LLVM_push_iteration to support optimizations that result in multiple iterations executing concurrently.
- Add DW_OP_LLVM_overlay and DW_OP_LLVM_bit_overlay to support expressing the location of arrays that are promoted to vector registers in SIMD vectorized loops.
- Generally clarify the difference between SIMT and SIMD execution.
- Change the DW_AT_LLVM_active_lane attribute to take location description expression so that a loclist can be used to express different vales at different program locations.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D117572
Files:
llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
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