[PATCH] D117497: [X86] Add some missing dependency-breaking zero idiom patterns to scheduler models

Tue Jan 18 05:52:56 PST 2022

pengfei accepted this revision.
pengfei added a comment.
This revision is now accepted and ready to land.

LGTM, but let's see if other reviewers have opinion about it.

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Comment at: llvm/lib/Target/X86/X86SchedBroadwell.td:1762
+    PSUBBrr, PSUBWrr, PSUBDrr, PSUBQrr,
+    PCMPGTBrr, PCMPGTDrr, PCMPGTQrr, PCMPGTWrr
+  ], ZeroIdiomPredicate>,
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RKSimon wrote:
> pengfei wrote:
> > I didn't find this information on AoM. 
> Yes - the PCMPGT variants are only mentioned in Agner's microarch doc, not in the Intel AoM - should I drop them?
I don't have strong opinion about that. I assume Agner's information is reasonable. So I'm happy with it.

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Comment at: llvm/test/tools/llvm-mca/X86/Znver1/zero-idioms.s:205
 # CHECK:      Register File statistics:
-# CHECK-NEXT: Total number of mappings created:    115
-# CHECK-NEXT: Max number of mappings used:         58
+# CHECK-NEXT: Total number of mappings created:    0
+# CHECK-NEXT: Max number of mappings used:         0
----------------
RKSimon wrote:
> pengfei wrote:
> > I know nothing about znver, but is 0 too aggressive?
> This is a general llvm-mca behaviour - it assumes that there is no need for physical reg allocation for known zero registers - its nothing to do with znver specifically (all the test cases here are zeroidioms so it reports zero).
Got it, thank you.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117497/new/

https://reviews.llvm.org/D117497