[llvm] 1b09d0c - [VE] VECustomDAG builder class
Simon Moll via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 18 03:09:26 PST 2022
Author: Simon Moll
Date: 2022-01-18T12:08:07+01:00
New Revision: 1b09d0c42b42be219dd0984e0714d68b4a36cd3e
URL: https://github.com/llvm/llvm-project/commit/1b09d0c42b42be219dd0984e0714d68b4a36cd3e
DIFF: https://github.com/llvm/llvm-project/commit/1b09d0c42b42be219dd0984e0714d68b4a36cd3e.diff
LOG: [VE] VECustomDAG builder class
VECustomDAG's functions simplify emitting VE custom ISD nodes. The class
is just a stub now. We add more functions, in particular for the
VP->VVP->VE lowering, to VECustomDAG as we build up vector isel.
Reviewed By: kaz7
Differential Revision: https://reviews.llvm.org/D116103
Added:
llvm/lib/Target/VE/VECustomDAG.cpp
llvm/lib/Target/VE/VECustomDAG.h
Modified:
llvm/lib/Target/VE/CMakeLists.txt
llvm/lib/Target/VE/VEISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/CMakeLists.txt b/llvm/lib/Target/VE/CMakeLists.txt
index 9615f21f7143..cc858e7e38e7 100644
--- a/llvm/lib/Target/VE/CMakeLists.txt
+++ b/llvm/lib/Target/VE/CMakeLists.txt
@@ -16,6 +16,7 @@ add_public_tablegen_target(VECommonTableGen)
add_llvm_target(VECodeGen
LVLGen.cpp
VEAsmPrinter.cpp
+ VECustomDAG.cpp
VEFrameLowering.cpp
VEISelDAGToDAG.cpp
VEISelLowering.cpp
diff --git a/llvm/lib/Target/VE/VECustomDAG.cpp b/llvm/lib/Target/VE/VECustomDAG.cpp
new file mode 100644
index 000000000000..98348c504990
--- /dev/null
+++ b/llvm/lib/Target/VE/VECustomDAG.cpp
@@ -0,0 +1,27 @@
+//===-- VECustomDAG.h - VE Custom DAG Nodes ------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the interfaces that VE uses to lower LLVM code into a
+// selection DAG.
+//
+//===----------------------------------------------------------------------===//
+
+#include "VECustomDAG.h"
+
+#ifndef DEBUG_TYPE
+#define DEBUG_TYPE "vecustomdag"
+#endif
+
+namespace llvm {
+
+SDValue VECustomDAG::getConstant(uint64_t Val, EVT VT, bool IsTarget,
+ bool IsOpaque) const {
+ return DAG.getConstant(Val, DL, VT, IsTarget, IsOpaque);
+}
+
+} // namespace llvm
diff --git a/llvm/lib/Target/VE/VECustomDAG.h b/llvm/lib/Target/VE/VECustomDAG.h
new file mode 100644
index 000000000000..05c4c603c2fa
--- /dev/null
+++ b/llvm/lib/Target/VE/VECustomDAG.h
@@ -0,0 +1,71 @@
+//===------------ VECustomDAG.h - VE Custom DAG Nodes -----------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the helper functions that VE uses to lower LLVM code into a
+// selection DAG. For example, hiding SDLoc, and easy to use SDNodeFlags.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
+#define LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
+
+#include "VE.h"
+#include "VEISelLowering.h"
+#include "llvm/CodeGen/SelectionDAG.h"
+#include "llvm/CodeGen/TargetLowering.h"
+
+namespace llvm {
+
+class VECustomDAG {
+ SelectionDAG &DAG;
+ SDLoc DL;
+
+public:
+ SelectionDAG *getDAG() const { return &DAG; }
+
+ VECustomDAG(SelectionDAG &DAG, SDLoc DL) : DAG(DAG), DL(DL) {}
+
+ VECustomDAG(SelectionDAG &DAG, SDValue WhereOp) : DAG(DAG), DL(WhereOp) {}
+
+ VECustomDAG(SelectionDAG &DAG, const SDNode *WhereN) : DAG(DAG), DL(WhereN) {}
+
+ /// getNode {
+ SDValue getNode(unsigned OC, SDVTList VTL, ArrayRef<SDValue> OpV,
+ Optional<SDNodeFlags> Flags = None) const {
+ auto N = DAG.getNode(OC, DL, VTL, OpV);
+ if (Flags)
+ N->setFlags(*Flags);
+ return N;
+ }
+
+ SDValue getNode(unsigned OC, ArrayRef<EVT> ResVT, ArrayRef<SDValue> OpV,
+ Optional<SDNodeFlags> Flags = None) const {
+ auto N = DAG.getNode(OC, DL, ResVT, OpV);
+ if (Flags)
+ N->setFlags(*Flags);
+ return N;
+ }
+
+ SDValue getNode(unsigned OC, EVT ResVT, ArrayRef<SDValue> OpV,
+ Optional<SDNodeFlags> Flags = None) const {
+ auto N = DAG.getNode(OC, DL, ResVT, OpV);
+ if (Flags)
+ N->setFlags(*Flags);
+ return N;
+ }
+
+ SDValue getUNDEF(EVT VT) const { return DAG.getUNDEF(VT); }
+ /// } getNode
+
+ SDValue getConstant(uint64_t Val, EVT VT, bool IsTarget = false,
+ bool IsOpaque = false) const;
+};
+
+} // namespace llvm
+
+#endif // LLVM_LIB_TARGET_VE_VECUSTOMDAG_H
diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp
index 601bd5b0481e..f513b130a1e6 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -11,6 +11,7 @@
//
//===----------------------------------------------------------------------===//
+#include "VECustomDAG.h"
#include "VEISelLowering.h"
#include "MCTargetDesc/VEMCExpr.h"
#include "VEInstrBuilder.h"
@@ -1640,18 +1641,18 @@ static SDValue getSplatValue(SDNode *N) {
SDValue VETargetLowering::lowerBUILD_VECTOR(SDValue Op,
SelectionDAG &DAG) const {
- SDLoc DL(Op);
+ VECustomDAG CDAG(DAG, Op);
unsigned NumEls = Op.getValueType().getVectorNumElements();
MVT ElemVT = Op.getSimpleValueType().getVectorElementType();
// If there is just one element, expand to INSERT_VECTOR_ELT.
unsigned UniqueIdx;
if (getUniqueInsertion(Op.getNode(), UniqueIdx)) {
- SDValue AccuV = DAG.getUNDEF(Op.getValueType());
+ SDValue AccuV = CDAG.getUNDEF(Op.getValueType());
auto ElemV = Op->getOperand(UniqueIdx);
- SDValue IdxV = DAG.getConstant(UniqueIdx, DL, MVT::i64);
- return DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, Op.getValueType(), AccuV,
- ElemV, IdxV);
+ SDValue IdxV = CDAG.getConstant(UniqueIdx, MVT::i64);
+ return CDAG.getNode(ISD::INSERT_VECTOR_ELT, Op.getValueType(),
+ {AccuV, ElemV, IdxV});
}
// Else emit a broadcast.
@@ -1659,9 +1660,9 @@ SDValue VETargetLowering::lowerBUILD_VECTOR(SDValue Op,
// lower to VEC_BROADCAST
MVT LegalResVT = MVT::getVectorVT(ElemVT, 256);
- auto AVL = DAG.getConstant(NumEls, DL, MVT::i32);
- return DAG.getNode(VEISD::VEC_BROADCAST, DL, LegalResVT, Op.getOperand(0),
- AVL);
+ auto AVL = CDAG.getConstant(NumEls, MVT::i32);
+ return CDAG.getNode(VEISD::VEC_BROADCAST, LegalResVT,
+ {Op.getOperand(0), AVL});
}
// Expand
@@ -2691,7 +2692,7 @@ SDValue VETargetLowering::lowerToVVP(SDValue Op, SelectionDAG &DAG) const {
const bool FromVP = ISD::isVPOpcode(Opcode);
// The representative and legalized vector type of this operation.
- SDLoc DL(Op);
+ VECustomDAG CDAG(DAG, Op);
MVT MaskVT = MVT::v256i1; // TODO: packed mode.
EVT OpVecVT = Op.getValueType();
EVT LegalVecVT = getTypeToTransformTo(*DAG.getContext(), OpVecVT);
@@ -2708,10 +2709,10 @@ SDValue VETargetLowering::lowerToVVP(SDValue Op, SelectionDAG &DAG) const {
} else {
// Materialize the VL parameter.
- AVL = DAG.getConstant(OpVecVT.getVectorNumElements(), DL, MVT::i32);
- SDValue ConstTrue = DAG.getConstant(1, DL, MVT::i32);
- Mask = DAG.getNode(VEISD::VEC_BROADCAST, DL, MaskVT,
- ConstTrue); // emit a VEISD::VEC_BROADCAST here.
+ AVL = CDAG.getConstant(OpVecVT.getVectorNumElements(), MVT::i32);
+ SDValue ConstTrue = CDAG.getConstant(1, MVT::i32);
+ Mask = CDAG.getNode(VEISD::VEC_BROADCAST, MaskVT,
+ ConstTrue); // emit a VEISD::VEC_BROADCAST here.
}
// Categories we are interested in.
@@ -2727,13 +2728,13 @@ SDValue VETargetLowering::lowerToVVP(SDValue Op, SelectionDAG &DAG) const {
if (IsBinaryOp) {
assert(LegalVecVT.isSimple());
- return DAG.getNode(VVPOpcode, DL, LegalVecVT, Op->getOperand(0),
- Op->getOperand(1), Mask, AVL);
+ return CDAG.getNode(VVPOpcode, LegalVecVT,
+ {Op->getOperand(0), Op->getOperand(1), Mask, AVL});
} else if (VVPOpcode == VEISD::VVP_SELECT) {
auto Mask = Op->getOperand(0);
auto OnTrue = Op->getOperand(1);
auto OnFalse = Op->getOperand(2);
- return DAG.getNode(VVPOpcode, DL, LegalVecVT, OnTrue, OnFalse, Mask, AVL);
+ return CDAG.getNode(VVPOpcode, LegalVecVT, {OnTrue, OnFalse, Mask, AVL});
}
llvm_unreachable("lowerToVVP called for unexpected SDNode.");
}
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