[PATCH] D117466: [RISCV] Add patterns for vector widening floating-point add/subtract instructions

[Jianjian Guan via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc29d6c410e76: [RISCV] Add patterns for vector widening floating-point add/subtract… (authored by jacquesguan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117466/new/

https://reviews.llvm.org/D117466

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll

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