[PATCH] D117508: [SDAG] add demanded bits transform for bswap

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

> The test for PowerPC is over-reduced with undefs, so I made it valid again by passing in pointer args and renamed the values to make the logic clearer.

Is that part of a different patch or a pre-commit? There's no PowerPC test change in this patch.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1828
+      EVT ShAmtTy = VT;
+      if (TLO.LegalTypes() && !ShAmtTy.isVector())
+        ShAmtTy = getShiftAmountTy(ShAmtTy, DL);
----------------
Why can't we use getShiftAmountTy always? I fixed the problem that it only works for legal types a few months ago.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117508/new/

https://reviews.llvm.org/D117508