[PATCH] D117006: [PowerPC] Add custom lowering for SELECT_CC fp128 using xsmaxcqp
Qiu Chaofan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 17 02:17:36 PST 2022
qiucf added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1915
let Predicates = [Power10Instrs] in {
- def XSMAXCQP : X_VT5_VA5_VB5<63, 676, "xsmaxcqp", []>;
- def XSMINCQP : X_VT5_VA5_VB5<63, 740, "xsmincqp", []>;
+ def XSMAXCQP : X_VT5_VA5_VB5<63, 676, "xsmaxcqp",
+ [(set f128:$vT, (PPCxsmaxcq f128:$vA, f128:$vB))]>;
----------------
tingwang wrote:
> tingwang wrote:
> > qiucf wrote:
> > > I'm not sure why `xscmpeqqp` are located here, but this should be better placed at `PPCInstrVSX.td`.
> > Thanks! I will move XS(MAX|MIN)CQP to sit together with XSMAXCDP.
> A closer look at PPCInstrPrefix.td and PPCInstrVSX.td, all instructions with Power10Instrs predicate are located inside PPCInstrPrefix.td, and does not have any in PPCInstrVSX.td. There maybe some other preference regarding the placement, guess just leave it as is...
The name 'Prefix' stands for new ISA 3.1 feature - prefixed instruction, but 128-bit fp max/min is not one of them. Anyway, it's okay to leave them here and we'll do clean-up in the future when all Power10 instructions are implemented.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D117006/new/
https://reviews.llvm.org/D117006
More information about the llvm-commits
mailing list