[PATCH] D117844: [AMDGPU] Prevent aliasing of SrcC and Dst in MAI

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 21 15:44:51 PST 2022


rampitec updated this revision to Diff 402125.
rampitec added a comment.

Changed to duplicate instruction definitions and use two-address pass.

A followup patch to validate operand constraints in asm also needed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117844/new/

https://reviews.llvm.org/D117844

Files:
  llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/lib/Target/AMDGPU/VOP3PInstructions.td
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
  llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
  llvm/test/CodeGen/AMDGPU/spill-agpr.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D117844.402125.patch
Type: text/x-patch
Size: 17635 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220121/bec81ba5/attachment-0001.bin>


More information about the llvm-commits mailing list