[llvm] 6605057 - Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)"
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 23 08:28:53 PST 2022
Author: Simon Pilgrim
Date: 2022-01-23T16:28:44Z
New Revision: 6605057992b15183663f0d918b7707f371862fd7
URL: https://github.com/llvm/llvm-project/commit/6605057992b15183663f0d918b7707f371862fd7
DIFF: https://github.com/llvm/llvm-project/commit/6605057992b15183663f0d918b7707f371862fd7.diff
LOG: Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everything but LSB is known zero (PR51312)"
Noticed a typo in the getBooleanContents call just after I pressed commit :(
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/X86/parity-vec.ll
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 269c332ae28a1..3b53a5b8b7532 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3254,29 +3254,17 @@ bool TargetLowering::isExtendedTrueVal(const ConstantSDNode *N, EVT VT,
SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
ISD::CondCode Cond, const SDLoc &DL,
DAGCombinerInfo &DCI) const {
+ // Match these patterns in any of their permutations:
+ // (X & Y) == Y
+ // (X & Y) != Y
if (N1.getOpcode() == ISD::AND && N0.getOpcode() != ISD::AND)
std::swap(N0, N1);
- SelectionDAG &DAG = DCI.DAG;
EVT OpVT = N0.getValueType();
if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() ||
(Cond != ISD::SETEQ && Cond != ISD::SETNE))
return SDValue();
- // (X & Y) != 0 --> zextOrTrunc(X & Y)
- // iff everything but LSB is known zero:
- if (Cond == ISD::SETNE && isNullConstant(N1) &&
- (getBooleanContents(VT) == TargetLowering::UndefinedBooleanContent ||
- getBooleanContents(VT) == TargetLowering::ZeroOrOneBooleanContent)) {
- unsigned NumEltBits = OpVT.getScalarSizeInBits();
- APInt UpperBits = APInt::getHighBitsSet(NumEltBits, NumEltBits - 1);
- if (DAG.MaskedValueIsZero(N0, UpperBits))
- return DAG.getBoolExtOrTrunc(N0, DL, VT, OpVT);
- }
-
- // Match these patterns in any of their permutations:
- // (X & Y) == Y
- // (X & Y) != Y
SDValue X, Y;
if (N0.getOperand(0) == N1) {
X = N0.getOperand(1);
@@ -3288,6 +3276,7 @@ SDValue TargetLowering::foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1,
return SDValue();
}
+ SelectionDAG &DAG = DCI.DAG;
SDValue Zero = DAG.getConstant(0, DL, OpVT);
if (DAG.isKnownToBeAPowerOfTwo(Y)) {
// Simplify X & Y == Y to X & Y != 0 if Y has exactly one bit set.
diff --git a/llvm/test/CodeGen/X86/parity-vec.ll b/llvm/test/CodeGen/X86/parity-vec.ll
index ed64bb5eddf49..60d9d4be68e79 100644
--- a/llvm/test/CodeGen/X86/parity-vec.ll
+++ b/llvm/test/CodeGen/X86/parity-vec.ll
@@ -36,8 +36,8 @@ define i1 @canonical_parity(<16 x i1> %x) {
; POPCNT-NEXT: psllw $7, %xmm0
; POPCNT-NEXT: pmovmskb %xmm0, %eax
; POPCNT-NEXT: popcntl %eax, %eax
-; POPCNT-NEXT: andl $1, %eax
-; POPCNT-NEXT: # kill: def $al killed $al killed $eax
+; POPCNT-NEXT: testb $1, %al
+; POPCNT-NEXT: setne %al
; POPCNT-NEXT: retq
%i1 = bitcast <16 x i1> %x to i16
%i2 = call i16 @llvm.ctpop.i16(i16 %i1)
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