[PATCH] D117975: [JITLink][RISCV] fix the extractBits behavior and add R_RISCV_JAL relocation.

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

Why is it so hard to go read the LLD code. This is clearly wrong. LLD:

  case R_RISCV_JAL: {
    checkInt(loc, static_cast<int64_t>(val) >> 1, 20, rel);
    checkAlignment(loc, val, 2, rel);
  
    uint32_t insn = read32le(loc) & 0xFFF;
    uint32_t imm20 = extractBits(val, 20, 20) << 31;
    uint32_t imm10_1 = extractBits(val, 10, 1) << 21;
    uint32_t imm11 = extractBits(val, 11, 11) << 20;
    uint32_t imm19_12 = extractBits(val, 19, 12) << 12;
    insn |= imm20 | imm10_1 | imm11 | imm19_12;
  
    write32le(loc, insn);
    return;
  }



================
Comment at: llvm/include/llvm/ExecutionEngine/JITLink/riscv.h:47-51
+  /// High 20 bits of PC-relative jump pointer value relocation
+  ///
+  /// Fixup expression:
+  ///   Fixup <- (Target - Fixup + Addend) >> 12
+  ///
----------------
This is still all wrong


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D117975/new/

https://reviews.llvm.org/D117975