[PATCH] D117969: [RISCV] Use FP ABI for some RVV intrinsic tests. NFC

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 22 22:17:16 PST 2022


This revision was automatically updated to reflect the committed changes.
Closed by commit rGbe6070c290e2: [RISCV] Use FP ABI for some RVV intrinsic tests. NFC (authored by craig.topper).

Changed prior to commit:
  https://reviews.llvm.org/D117969?vs=402261&id=402292#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117969/new/

https://reviews.llvm.org/D117969

Files:
  llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll



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