[PATCH] D116890: [RISCV] Add initial support for getRegUsageForType and getNumberOfRegisters
Kito Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 16 19:31:04 PST 2022
kito-cheng updated this revision to Diff 400422.
kito-cheng added a comment.
Changes:
- Check V ext. when calculating register usage for scalable types.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D116890/new/
https://reviews.llvm.org/D116890
Files:
llvm/lib/Target/RISCV/RISCVSubtarget.h
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/test/Transforms/LoopVectorize/RISCV/reg-usage.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D116890.400422.patch
Type: text/x-patch
Size: 6273 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220117/90cb36b1/attachment.bin>
More information about the llvm-commits
mailing list