[PATCH] D117426: [AVR] Only push and clear R1 in interrupts when necessary

Ayke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 16 04:43:52 PST 2022


aykevl added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:1347
-  // SREG is always implicitly killed
-  MIB->getOperand(2).setIsKill();
 
----------------
This was a bug.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:821
 
+// Modify the existing ISD::INLINEASM node to add the implicit register r1.
+SDValue AVRTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
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This is a bit of a hack, but I couldn't think of a better way.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117426/new/

https://reviews.llvm.org/D117426



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