[PATCH] D117188: [RISCV] Add patterns for vector widening integer add/subtract

[Jianjian Guan via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGb148348ad486: [RISCV] Add patterns for vector widening integer add/subtract (authored by jacquesguan).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117188/new/

https://reviews.llvm.org/D117188

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll

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